Abstract:
A new process is provided which is an extension and improvement of present processing for the creation of a solder bump. After the layers of Under Bump Metal and a layer of solder metal have been created in patterned and etched format and overlying the contact pad, following a conventional processing sequence, a layer of polyimide is deposited. The solder flow is performed using the thickness of the deposited layer of polyimide to control the height of the column underneath the reflown solder.
Abstract:
A new method and processing sequence is provided for the formation of solder bumps that are in contact with underlying aluminum contact pads. A patterned layer of negative photoresist is interposed between a patterned layer of PE Si3N4 and a patterned layer of polyamide insulator. The patterned negative photoresist partially overlays the aluminum contact pad and prevents contact between the layer of polyamide insulator and the aluminum contact pad. By forming this barrier no moisture that is contained in the polyamide insulator can come in contact with the aluminum contact pad, therefore no corrosion in the surface of the aluminum contact pad can occur.
Abstract translation:提供了一种新的方法和处理顺序,用于形成与下面的铝接触焊盘接触的焊料凸块。 在图案化的PE Si 3 N 4层和聚酰胺绝缘体的图案化层之间插入负型光致抗蚀剂的图案层。 图案化的负光致抗蚀剂部分覆盖铝接触垫,并防止聚酰胺绝缘体层与铝接触垫之间的接触。 通过形成该屏障,聚酰胺绝缘体中所含的水分不能与铝接触垫接触,因此铝接触垫的表面中不会发生腐蚀。
Abstract:
A method for developing a semiconductor device low resistance electrical contact is described. In this process a gate oxide layer followed by a polysilicon layer is deposited on the semiconductor substrate in proximity to the device contact area. It is subsequently patterned with photoresist and etched to produce the desired gate structure. This is followed by a deposited layer of silicon dioxide or silicon nitride (SIN) which is appropriately patterned and etched to form gate isolation spacers. Then a nominal 300 Å layer of silicon nitride (SIN) is deposited followed by a layer of tetraethyl orthosilicate (TEOS) or borophosphosilicate glass (BPSG). The contact area is defined by photolithography, and the passivation layers are etched either by a dry etch such as a RIE process, or a combination of a wet BOE process followed by a dry etch, to form the metal contact holes. Prior to sputtering the contact metal, the contact area is cleaned with a 30 second dip in a BOE solution, followed by a Hydrogen Peroxide (H2O2) dip. This H2O2 cleaning step enables lower device contact resistance for the P+ contact areas.
Abstract translation:描述了一种用于开发半导体器件低电阻电接触的方法。 在该过程中,在半导体衬底上沉积接近器件接触区的栅极氧化层,随后是多晶硅层。 随后用光致抗蚀剂图案化并蚀刻以产生所需的栅极结构。 之后是二氧化硅或氮化硅(SIN)的沉积层,其被适当地图案化和蚀刻以形成栅极隔离间隔物。 然后沉积标称的300Å氮化硅层(SIN),然后沉积原硅酸四乙酯(TEOS)或硼磷硅酸盐玻璃(BPSG)。 通过光刻法定义接触区域,并且通过诸如RIE工艺的干法蚀刻或者湿法BOE工艺的组合然后进行干蚀刻蚀刻钝化层,以形成金属接触孔。 在溅射接触金属之前,接触面积在BOE溶液中用30秒浸渍,然后用过氧化氢(H 2 O 2)浸渍进行清洗。 该H 2 O 2清洁步骤可以降低P +接触区域的器件接触电阻。
Abstract:
Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.
Abstract:
Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.
Abstract:
The disclosure relates to a method and apparatus for preventing extrusion or spiking of a metal atom from a metallization layer to other layers of a silicon wafer. In one embodiment, the method includes forming a silicon-on-ship device with a MEMS component on the substrate. The MEMS component may include one or more metal or metallic alloys. To prevent spiking from the MEMS component, the sides thereof can be coated with one ore more spacer or barrier layers. In one embodiment, oxygen plasma and thermal oxidation methods are used to deposit spacers. In another embodiment, an oxide layer is deposited over the wafer, covering the substrate and the MEMS component. Selective etching or anisotropic etching can be used to remove the oxide layer from certain regions of the MEMS and the substrate while covering the sidewalls. An amorphous silicon layer can then be deposited to cover the MEMS device.
Abstract:
A method for alignment to an alignment mark array within a patterned electronic material layer, formed on a substrate employed in a microelectronics fabrication, with improved registration accuracy of a subsequent step-and-repeat photomask pattern. There is first provided a substrate upon which is formed a patterned microelectronics layer containing an alignment mark array. There is then formed over the substrate and patterned layer, covering over the alignment marks, a subsequent layer or layers which may be of opaque material. In order to align properly a patterned photomask for patterning the overlying layer by means of conventional photolithography, the alignment mark array is located by first scanning with a laser light source contained within a step-and-repeat apparatus containing the patterned photomask and detecting the optical radiation signal scattered from the alignment mark array. The accuracy of location may be enhanced by rotating the orientation of the alignment mark array with respect to the direction of scanning with the laser light source by 90 degrees to render the subsequent orientation orthogonal to the first orientation, and then repeating the scanning operation. The altered nature of the back-scattered light signal from the orthogonal scanning direction provides additional information for improving the precision of location and alignment.
Abstract:
A method for bumping and backlapping a semiconductor wafer that has a multiplicity of solder bumps formed on an active surface of the wafer is disclosed. In the method, a preprocessed wafer that has a multiplicity of bond pads formed on a top surface is first provided, a under-bump-metallurgy (UBM) layer is then sputter deposited on top of the wafer surface, followed by the lamination of a dry film resist layer on top of the UBM layer. The dry film resist layer is then patterned with a multiplicity of openings exposing the multiplicity of bond pads, followed by the deposition of a solder material into the multiplicity of openings to form the solder bump's. A protective tape is then adhesively bonded to the top of the dry film resist layer before the wafer is positioned into a backlapping apparatus for removing of a preselected thickness from the backside of the wafer. After the completion of the backside lapping process, the protective tape and the dry film resist layer are stripped away sequentially and the solder bumps are reflown into solder balls. The present invention novel method effectively prevents any damages to. the solder balls during the backlapping process since the solder bumps are well protected by the dry film resist layer during such process.
Abstract:
Within a method for fabricating an microelectronic fabrication there is first provided a substrate employed within an optoelectronic microelectronic fabrication, where the substrate comprises an optoelectronic microelectronic device which is in electrical communication with a bond pad formed over the substrate. There is then processed, when fabricating the substrate to form the optoelectronic microelectronic fabrication, the substrate in the absence of optoelectronically transducable radiation, in order to attenuate corrosion of the bond pad. The method is particularly useful for forming a color filter sensor image array optoelectronic microelectronic fabrication comprising multiple photoresist based patterned colored filter layers.
Abstract:
A new method and processing sequence is provided for the formation of solder bumps that are in contact with underlying aluminum contact pads. A patterned layer of negative photoresist is interposed between a patterned layer of PE Si3N4 and a patterned layer of polyamide insulator. The patterned negative photoresist partially overlays the aluminum contact pad and prevents contact between the layer of polyamide insulator and the aluminum contact pad. By forming this barrier no moisture that is contained in the polyamide insulator can come in contact with the aluminum contact pad, therefore no corrosion in the surface of the aluminum contact pad can occur.
Abstract translation:提供了一种新的方法和处理顺序,用于形成与下面的铝接触焊盘接触的焊料凸块。 负型光致抗蚀剂的图案化层插入在PE 3 N 4 N 4的图案化层和聚酰胺绝缘体的图案化层之间。 图案化的负光致抗蚀剂部分覆盖铝接触垫,并防止聚酰胺绝缘体层与铝接触垫之间的接触。 通过形成该屏障,聚酰胺绝缘体中所含的水分不能与铝接触垫接触,因此铝接触垫的表面中不会发生腐蚀。