Method to reduce device contact resistance using a hydrogen peroxide treatment
    3.
    发明授权
    Method to reduce device contact resistance using a hydrogen peroxide treatment 有权
    使用过氧化氢处理降低器件接触电阻的方法

    公开(公告)号:US06242331B1

    公开(公告)日:2001-06-05

    申请号:US09467129

    申请日:1999-12-20

    Abstract: A method for developing a semiconductor device low resistance electrical contact is described. In this process a gate oxide layer followed by a polysilicon layer is deposited on the semiconductor substrate in proximity to the device contact area. It is subsequently patterned with photoresist and etched to produce the desired gate structure. This is followed by a deposited layer of silicon dioxide or silicon nitride (SIN) which is appropriately patterned and etched to form gate isolation spacers. Then a nominal 300 Å layer of silicon nitride (SIN) is deposited followed by a layer of tetraethyl orthosilicate (TEOS) or borophosphosilicate glass (BPSG). The contact area is defined by photolithography, and the passivation layers are etched either by a dry etch such as a RIE process, or a combination of a wet BOE process followed by a dry etch, to form the metal contact holes. Prior to sputtering the contact metal, the contact area is cleaned with a 30 second dip in a BOE solution, followed by a Hydrogen Peroxide (H2O2) dip. This H2O2 cleaning step enables lower device contact resistance for the P+ contact areas.

    Abstract translation: 描述了一种用于开发半导体器件低电阻电接触的方法。 在该过程中,在半导体衬底上沉积接近器件接触区的栅极氧化层,随后是多晶硅层。 随后用光致抗蚀剂图案化并蚀刻以产生所需的栅极结构。 之后是二氧化硅或氮化硅(SIN)的沉积层,其被适当地图案化和蚀刻以形成栅极隔离间隔物。 然后沉积标称的300Å氮化硅层(SIN),然后沉积原硅酸四乙酯(TEOS)或硼磷硅酸盐玻璃(BPSG)。 通过光刻法定义接触区域,并且通过诸如RIE工艺的干法蚀刻或者湿法BOE工艺的组合然后进行干蚀刻蚀刻钝化层,以形成金属接触孔。 在溅射接触金属之前,接触面积在BOE溶液中用30秒浸渍,然后用过氧化氢(H 2 O 2)浸渍进行清洗。 该H 2 O 2清洁步骤可以降低P +接触区域的器件接触电阻。

    Colors only process to reduce package yield loss
    4.
    发明授权
    Colors only process to reduce package yield loss 有权
    颜色只能减少包装产量损失

    公开(公告)号:US07816169B2

    公开(公告)日:2010-10-19

    申请号:US12347468

    申请日:2008-12-31

    Abstract: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.

    Abstract translation: 公开了一种有序的微电子制造顺序,其中滤色器通过直角沉积直接形成在CCD,CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面,并且覆盖有高透光率平面化膜 指定的折射率和物理性质,其优化光收集到光电二极管而不需要额外的常规微透镜。 光学平坦的顶表面用于封装和保护成像器免受化学和热清洁处理损伤,最小化形成的底层变化,其将形成在非平面表面上的图像的像差或引起反射损失,并且消除在切割期间引起的残留颗粒夹杂物, 打包。 通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。 光电二极管阵列设置有金属遮光罩,钝化,并且在其上形成滤色器。 沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置,而不需要常规的凸起的微透镜。

    Colors only process to reduce package yield loss
    5.
    发明授权
    Colors only process to reduce package yield loss 有权
    颜色只能减少包装产量损失

    公开(公告)号:US07485906B2

    公开(公告)日:2009-02-03

    申请号:US11642225

    申请日:2006-12-20

    Abstract: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.

    Abstract translation: 公开了一种有序的微电子制造顺序,其中滤色器通过直角沉积直接形成在CCD,CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面,并且覆盖有高透光率平面化膜 指定的折射率和物理性质,其优化光收集到光电二极管而不需要额外的常规微透镜。 光学平坦的顶表面用于封装和保护成像器免受化学和热清洁处理损伤,最小化形成的底层变化,其将形成在非平面表面上的图像的像差或引起反射损失,并且消除在切割期间引起的残留颗粒夹杂物, 打包。 通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。 光电二极管阵列设置有金属遮光罩,钝化,并且在其上形成滤色器。 沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置,而不需要常规的凸起的微透镜。

    Method and apparatus for preventing metal/silicon spiking in MEMS devices
    6.
    发明申请
    Method and apparatus for preventing metal/silicon spiking in MEMS devices 审中-公开
    用于防止MEMS器件中金属/硅尖峰的方法和装置

    公开(公告)号:US20060110842A1

    公开(公告)日:2006-05-25

    申请号:US10996234

    申请日:2004-11-23

    CPC classification number: B81C1/00253 B81C2201/0178 B81C2201/053

    Abstract: The disclosure relates to a method and apparatus for preventing extrusion or spiking of a metal atom from a metallization layer to other layers of a silicon wafer. In one embodiment, the method includes forming a silicon-on-ship device with a MEMS component on the substrate. The MEMS component may include one or more metal or metallic alloys. To prevent spiking from the MEMS component, the sides thereof can be coated with one ore more spacer or barrier layers. In one embodiment, oxygen plasma and thermal oxidation methods are used to deposit spacers. In another embodiment, an oxide layer is deposited over the wafer, covering the substrate and the MEMS component. Selective etching or anisotropic etching can be used to remove the oxide layer from certain regions of the MEMS and the substrate while covering the sidewalls. An amorphous silicon layer can then be deposited to cover the MEMS device.

    Abstract translation: 本公开涉及一种用于防止金属原子从金属化层挤出或尖峰到硅晶片其它层的方法和装置。 在一个实施例中,该方法包括在衬底上形成具有MEMS部件的在船上的硅装置。 MEMS组件可以包括一种或多种金属或金属合金。 为了防止从MEMS部件尖尖,其侧面可以涂覆一个或多个间隔物或阻挡层。 在一个实施例中,使用氧等离子体和热氧化方法来沉积间隔物。 在另一个实施例中,氧化物层沉积在晶片上,覆盖衬底和MEMS部件。 可以使用选择性蚀刻或各向异性蚀刻从覆盖侧壁的MEMS和衬底的某些区域去除氧化物层。 然后可以沉积非晶硅层以覆盖MEMS器件。

    Method for improved photomask alignment after epitaxial process through 90° orientation change
    7.
    发明授权
    Method for improved photomask alignment after epitaxial process through 90° orientation change 有权
    在通过90°取向变化的外延工艺后改进光掩模对准的方法

    公开(公告)号:US06468704B1

    公开(公告)日:2002-10-22

    申请号:US09835027

    申请日:2001-04-16

    Abstract: A method for alignment to an alignment mark array within a patterned electronic material layer, formed on a substrate employed in a microelectronics fabrication, with improved registration accuracy of a subsequent step-and-repeat photomask pattern. There is first provided a substrate upon which is formed a patterned microelectronics layer containing an alignment mark array. There is then formed over the substrate and patterned layer, covering over the alignment marks, a subsequent layer or layers which may be of opaque material. In order to align properly a patterned photomask for patterning the overlying layer by means of conventional photolithography, the alignment mark array is located by first scanning with a laser light source contained within a step-and-repeat apparatus containing the patterned photomask and detecting the optical radiation signal scattered from the alignment mark array. The accuracy of location may be enhanced by rotating the orientation of the alignment mark array with respect to the direction of scanning with the laser light source by 90 degrees to render the subsequent orientation orthogonal to the first orientation, and then repeating the scanning operation. The altered nature of the back-scattered light signal from the orthogonal scanning direction provides additional information for improving the precision of location and alignment.

    Abstract translation: 一种用于对准图案化电子材料层内的对准标记阵列的方法,其形成在微电子制造中使用的衬底上,具有改进的后续步进重复光掩模图案的配准精度。 首先设置有基板,在其上形成包含对准标记阵列的图案化微电子层。 然后在衬底和图案化层上形成覆盖对准标记的后续层或层,其可以是不透明材料。 为了适当地对准用于通过常规光刻法图案化上覆层的图案化光掩模,通过首先用包含在包含图案化光掩模的步进重复设备中的激光源进行扫描来定位对准标记阵列,并且检测光学 从对准标记阵列散射的辐射信号。 可以通过将对准标记阵列的方向相对于激光光源的扫描方向旋转90度来使得随后的方向与第一方位正交,然后重复扫描操作来提高位置的精度。 来自正交扫描方向的反向散射光信号的改变性质提供了用于提高位置和对准精度的附加信息。

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