Abstract:
A planar body is configured such that its edges engage the sidewall of a via of a device under test to create point electrical contacts and the planar body resists removal of the planar body from the via after insertion. The edges of the planar body may include barbs that create point electrical contacts and resist removal of the planar body from the via after insertion. The end of the body that is inserted into the via may form a tapered tip to facilitate insertion. The end of the planar body that is inserted into the via may include barbs that resist removal of the planar body from the via after insertion. The edges of the planar body may include stops that prevent further insertion of the planar body into the via beyond the stops.
Abstract:
A high density logic analyzer probing system has a probe mounting fixture for accurately positioning mounting posts to a device under test (DUT). The mounting posts includes a recess in one side for receiving a spring wire clip that mounts through holes in the DUT. The housing includes protrusions that receive screws for securing the probe head to the mounting posts on the DUT. The screws have a first shoulder that engages the protrusions and a second shoulder that engages the mounting post. The probe head is positioned between the mounting posts and tightened to the DUT using the screws. The first shoulder applies downward pressure on the probe head and the second shoulder provides a positive stop to prevent over tightening of the probe head which can cause damage to probe contacts in the probe head.
Abstract:
Method and apparatus for launching a coaxial cable onto a circuit board is described. In an example, a circuit board includes a front edge and a major surface. The major surface includes a recessed portion open to the front edge, the recessed portion being defined by a stop surface, opposing side surfaces, and a bottom surface. A plurality of conductive pads is disposed on the major surface. A conductive layer is disposed on at least a portion of the bottom surface. The recessed portion is adapted to receive a multiple conductor ribbon cable to provide thereby low-profile communication of the multiple conductor ribbon cable and the circuit board. The multiple conductor ribbon cable having a plurality of first conductors and a plurality of second conductors respectively associated with the plurality of first conductors. The plurality of conductive pads are adapted to receive respective first conductors of the multiple conductor ribbon cable. The conductive layer is adapted to receive respective second conductors of the multiple conductor ribbon cable.
Abstract:
A planar body is configured such that its edges engage the sidewall of a via of a device under test to create point electrical contacts and the planar body resists removal of the planar body from the via after insertion. The edges of the planar body may include barbs that create point electrical contacts and resist removal of the planar body from the via after insertion. The end of the body that is inserted into the via may form a tapered tip to facilitate insertion. The end of the planar body that is inserted into the via may include barbs that resist removal of the planar body from the via after insertion. The edges of the planar body may include stops that prevent further insertion of the planar body into the via beyond the stops.
Abstract:
A shielded signal pass-through or via structure integral with an electronic circuit board is described. The structure includes a rigid inner generally cylindrical conductor; at least a semi-rigid intermediate annular dielectric surrounding the conductor; and a rigid outer annular conductor surrounding the dielectric material. Also described is an interconnect device that presents a contact array in a boss region of a unitary embossed printed circuit board (PCB) optionally equipped with one or more such shielded vias.
Abstract:
A shielded signal pass-through or via structure integral with an electronic circuit board is described. The structure includes a rigid inner generally cylindrical conductor; at least a semi-rigid intermediate annular dielectric surrounding the conductor; and a rigid outer annular conductor surrounding the dielectric material. Also described is an interconnect device that presents a contact array in a boss region of a unitary embossed printed circuit board (PCB) optionally equipped with one or more such shielded vias.