公开(公告)号：US06817092B2

公开(公告)日：2004-11-16

申请号：US09972697

申请日：2001-10-04

Applicant: James Keith Custer ,  James Hiram Roberson ,  William Kerr Veitschegger

Inventor： James Keith Custer ,  James Hiram Roberson ,  William Kerr Veitschegger

IPC: H01R906

CPC classification number: H01R12/7082 ,  H01R12/523 ,  H01R12/58 ,  H05K3/1216 ,  H05K3/3447 ,  H05K3/3484 ,  H05K2201/10303 ,  H05K2201/10871 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49163

Abstract: A method allowing for the inexpensive automated construction of interconnections between circuit boards is provided. According to the present invention, printed circuit pins are inserted in a circuit board from the top (component side). Provided the heads of the pins are thin enough to lie beneath a solder stencil, the pins may be pre-installed on the circuit board and solder applied to the pins at the same time solder is applied to other regions of the board. Thus, known surface mount techniques may be employed to form solder connections between the pins and conductive traces on the circuit board, which facilitates the automation of the previously manual operation of soldering the printed circuit pins separately.

Abstract translation: 提供了允许在电路板之间廉价自动构建互连的方法。 根据本发明，印刷电路引脚从顶部（部件侧）插入到电路板中。 如果引脚的头部足够薄以便位于焊料模板之下，则引脚可以预先安装在电路板上，并且将焊料施加到引脚上，同时将焊料施加到板的其它区域。 因此，可以采用已知的表面贴装技术来形成引脚和电路板上的导电迹线之间的焊接连接，这有助于分别对印刷电路引脚进行以前的手动操作的自动化。

公开(公告)号：US06473314B1

公开(公告)日：2002-10-29

申请号：US09632151

申请日：2000-08-03

Applicant: James Keith Custer ,  Pauline Mei-Seung Tong

Inventor： James Keith Custer ,  Pauline Mei-Seung Tong

IPC: H05K114

CPC classification number: H05K1/0218 ,  H01L2223/6688 ,  H03H1/0007 ,  H05K9/0066

Abstract: A low cost radio frequency interference filter assembly comprises a multiple layer structure including a middle trace layer disposed between an upper ground layer and lower ground layer. Non-conductive insulation layers are disposed between the middle trace layer and the upper and lower ground layers. The upper layer includes input contacts, signal contacts, and capacitors which are coupled to the signal contacts and an upper grounded substrate. The middle trace layer includes a grounded substrate and trace lines which are coupled to the signal contacts of the upper layer by signal vias. The lower layer includes a grounded substrate. Ground vias are formed through the insulation layers to couple the middle grounded substrate to the upper and lower grounded substrates. The filter assembly may be formed as an integral projection of a printed circuit board assembly. A structure for an RF power amplifier assembly is provided along with methods for manufacturing a filter assembly and assembling an electronics assembly.

Abstract translation: 低成本射频干扰滤波器组件包括多层结构，其包括设置在上地层和下接地层之间的中间迹线层。 非导电绝缘层设置在中间迹线层和上下接地层之间。 上层包括耦合到信号触点和上接地衬底的输入触点，信号触点和电容器。 中间迹线层包括接地的基板和通过信号通孔耦合到上层的信号触点的迹线。 下层包括接地衬底。 通过绝缘层形成接地通孔，以将中间接地衬底耦合到上部和下部接地衬底。 过滤器组件可以形成为印刷电路板组件的整体突起。 提供了一种用于RF功率放大器组件的结构以及用于制造滤波器组件和组装电子组件的方法。

公开(公告)号：US6081160A

公开(公告)日：2000-06-27

申请号：US82651

申请日：1998-05-20

Applicant: James Keith Custer ,  Charles M. Keen ,  William Kerr Veitschegger

Inventor： James Keith Custer ,  Charles M. Keen ,  William Kerr Veitschegger

IPC: H03F1/48 ,  H03F1/56 ,  H03F3/60 ,  H05K1/02 ,  H05K1/18

CPC classification number: H03F3/60 ,  H03F1/483 ,  H03F1/565 ,  H05K1/0243 ,  H05K1/181

Abstract: For use with RF circuitry in which a DC bias circuit provides bias voltage is provided to impedance-matched circuitry, a structure is provided, in which a dielectric member, having a high dielectric constant, is selectively placed adjacent to a bias feed line coupled between the DC bias circuit and the remainder of the circuitry, to maintain high RF impedance while reducing impedance at lower frequencies. The invention has particular applicability to RF amplifiers, to be used for amplifying modulated carriers, such as video signals made up of an RF carrier and a lower-frequency modulation. Where the carrier has a predetermined wavelength, the physical length of the bias feed line and the dielectric constant of the dielectric member are chosen such that an effective length of the bias feed line is a quarter of the wavelength of the carrier.

Abstract translation: 为了与RF电路一起使用，其中DC偏置电路提供偏置电压被提供给阻抗匹配电路，提供了一种结构，其中具有高介电常数的电介质构件被选择性地放置在与偏置馈电线 DC偏置电路和电路的其余部分，以保持较高的RF阻抗同时降低较低频率下的阻抗。 本发明特别适用于用于放大调制载波的RF放大器，例如由RF载波和低频调制构成的视频信号。 在载体具有预定波长的情况下，选择偏置馈电线的物理长度和电介质构件的介电常数，使得偏置馈电线的有效长度为载波波长的四分之一。