公开(公告)号：US20240175138A1

公开(公告)日：2024-05-30

申请号：US18518393

申请日：2023-11-22

Applicant: ASM IP HOlding B.V.

Inventor： Fan Gao ,  Peipei Gao ,  Xing Lin ,  Arun Murali ,  Gregory Deye ,  Frederick Aryeetey ,  Amir Kajbafvala ,  Caleb Miskin ,  Alexandros Demos

IPC: C23C16/52 ,  C23C16/44 ,  C23C16/46 ,  H01L21/67

CPC classification number: C23C16/52 ,  C23C16/4412 ,  C23C16/46 ,  H01L21/67017 ,  H01L21/67126 ,  H01L21/67253

Abstract: Systems and methods controlling the pressure differential between two sealed chambers connected by a gate valve in preparation for a gate valve opening event. Such systems and methods may adjust gas pressure in at least one of the chambers, if needed, until the pressure differential between the two chambers is at a predetermined pressure differential level. In some more specific examples, one chamber may constitute a substrate handling chamber, the other chamber may constitute a reaction chamber (e.g., for depositing one or more layers on a surface of a substrate), and the gate valve opening event may allow a substrate to be transferred from one chamber to the other (e.g., from the reaction chamber into the substrate handling chamber).

公开(公告)号：US20250075317A1

公开(公告)日：2025-03-06

申请号：US18815445

申请日：2024-08-26

Applicant: ASM IP Holding B.V.

Inventor： Gregory Deye ,  Mohamed Ebaid Abdrabou Hussein

IPC: C23C16/44 ,  C23C16/455 ,  C23C16/46

Abstract: A material layer deposition method includes flowing a silicon-containing material layer precursor through a chamber body and forming a silicon-containing accretion within the chamber body. A chlorine (Cl2) gas-containing fill is introduced into the chamber body, at least a portion of the silicon-containing accretion is removed using the chlorine (Cl2) gas-containing fill, and the chlorine (Cl2) gas-containing fill and a silicon-containing etchant product removed from the chamber body. Semiconductor processing systems and computer program products are also described.

公开(公告)号：US20230193475A1

公开(公告)日：2023-06-22

申请号：US18068399

申请日：2022-12-19

Applicant: ASM IP Holding, B.V.

Inventor： Gregory Deye ,  Caleb Miskin ,  Hichem M'Saad ,  Steven Reiter ,  Alexandros Demos ,  Fei Wang

IPC: C23F1/12

CPC classification number: C23F1/12

Abstract: A method of processing a silicon surface includes using a first radical species to remove contamination from the surface and to roughen the surface; and using a second radical species to smooth the roughened surface. Reaction systems for performing such a method, and silicon surfaces prepared using such a method, also are provided.

公开(公告)号：US20240213022A1

公开(公告)日：2024-06-27

申请号：US18545699

申请日：2023-12-19

Applicant: ASM IP Holding B.V.

Inventor： Brendan Marozas ,  Rami Khazaka ,  Gregory Deye

IPC: H01L21/02 ,  C30B25/16 ,  C30B25/20 ,  C30B29/06 ,  H01L21/3065

CPC classification number: H01L21/0257 ,  C30B25/165 ,  C30B25/205 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/30655

Abstract: A method for epitaxially growing a phosphorus doped silicon layer on a substrate is disclosed. Embodiments of the presently described method comprise exposing a substrate to a silicon precursor and to a phosphorus precursor, wherein the exposure of the substrate to the phosphorus precursor is done during an overlapping period with the exposure to the silicon precursor.

公开(公告)号：US20230307255A1

公开(公告)日：2023-09-28

申请号：US18187468

申请日：2023-03-21

Applicant: ASM IP Holding, B.V.

Inventor： Gregory Deye ,  Caleb Miskin ,  Fan Gao ,  Peipei Gao

IPC: H01L21/67 ,  C23C16/44 ,  B08B9/032

CPC classification number: H01L21/67017 ,  B08B9/0325 ,  B08B9/0328 ,  C23C16/4405 ,  C23C16/4412 ,  B08B2209/032

Abstract: A semiconductor processing system includes a chamber arrangement, an exhaust arrangement connected to the chamber arrangement, an accretion sensor supported within the exhaust arrangement, and a processor. The processor is disposed in communication with the accretion sensor and is responsive to instructions recorded on a non-transitory machine-readable medium to receive an accretion signal from the accretion sensor, the accretion signal indicative of an accretion amount disposed within the exhaust arrangement, receive a predetermined accretion amount value, and compare the accretion amount to the predetermined accretion amount value. The instructions further cause the processor to execute an accretion countermeasure when the received accretion amount is greater than the predetermined accretion amount value. Methods of controlling accretion within exhaust arrangements for semiconductor processing systems and foreline assemblies for semiconductor processing systems are also described.

公开(公告)号：US20230265582A1

公开(公告)日：2023-08-24

申请号：US18110403

申请日：2023-02-16

Applicant: ASM IP Holding B.V.

Inventor： Gregory Deye ,  Yen Chun Fu ,  Arun Murali

IPC: C30B33/08 ,  C30B25/18 ,  C30B29/06

CPC classification number: C30B33/08 ,  C30B25/186 ,  C30B29/06

Abstract: A method of processing a surface of an epitaxially grown silicon film includes using a radical species to remove random surface terminations from the surface of the epitaxially grown silicon film and to generate a substantially uniform distribution of surface terminations. Reaction systems for performing such a method, and epitaxially grown films prepared using such a method, also are provided.

公开(公告)号：US20250112042A1

公开(公告)日：2025-04-03

申请号：US18900134

申请日：2024-09-27

Applicant: ASM IP Holding B.V.

Inventor： Gregory Deye ,  Caleb Miskin ,  Arun Murali

IPC: H01L21/02 ,  C30B25/12 ,  C30B25/16 ,  C30B33/12

Abstract: A method, comprising supporting a substrate within a chamber of a semiconductor processing system, wherein the substrate comprises a feature including a surface having at least two first regions comprising silicon in an Si(110) crystal orientation and at least one second region comprising silicon in a non-Si(110) crystal orientation, wherein the at least one second region is disposed between the first regions, epitaxially growing a silicon-containing material on the at least two first regions in a Si(100) crystal orientation preferentially to the Si(110) crystal orientation and extending the silicon-containing material over the second region.

公开(公告)号：US12252785B2

公开(公告)日：2025-03-18

申请号：US16888423

申请日：2020-05-29

Applicant: ASM IP Holding B.V.

Inventor： Gregory Deye ,  Joseph P. Margetis ,  John Tolle

IPC: C23C16/44 ,  H01L21/02

Abstract: A method of cleaning an epitaxial reaction chamber in-situ is disclosed. The method may include a pre-coating step, a high temperature baking step, and a gas etching step. The method is able to remove residue buildup within the reaction chamber, which may be made of quartz.

公开(公告)号：US20240222116A1

公开(公告)日：2024-07-04

申请号：US18398995

申请日：2023-12-28

Applicant: ASM IP Holding B.V.

Inventor： Gregory Deye ,  Caleb Miskin

IPC: H01L21/02 ,  C23C16/24 ,  C23C16/455 ,  C23C16/458 ,  C23C16/52 ,  C23C16/56 ,  C30B25/18

CPC classification number: H01L21/0262 ,  C23C16/24 ,  C23C16/45544 ,  C23C16/45553 ,  C23C16/4583 ,  C23C16/52 ,  C23C16/56 ,  C30B25/186 ,  H01L21/02576 ,  H01L21/02579

Abstract: A semiconductor processing system, comprising a chamber configured to support a substrate, a first precursor source, a second precursor source and a dopant source connected to the chamber and a controller operably connected the first precursor source, the second precursor source and the dopant source. The controller responsive to instructions recorded on a memory is to support a substrate within a chamber of a semiconductor processing system, flow a first precursor into the chamber in contact with a first surface of the substrate, form a template layer of silicon-containing film on the first surface of the substrate, etch non-uniformities on the first surface of the substrate, flow a dopant-containing precursor into the chamber in contact with a second surface of the substrate wherein the second surface is a top surface of the template layer, and form a nucleation layer on the second surface.

公开(公告)号：US20230125884A1

公开(公告)日：2023-04-27

申请号：US18048145

申请日：2022-10-20

Applicant: ASM IP Holding, B.V.

Inventor： Gregory Deye ,  Arun Murali ,  Frederick Aryeetey ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/67 ,  H01L21/687

Abstract: A material layer deposition method includes supporting a substrate in a preclean module and exposing the substrate to a preclean etchant while supported within the preclean module. The substrate is transferred to a deposition module and exposed to an adsorbate while supported within the deposition module. A material layer is the deposited onto the substrate while supported within the deposition module subsequent to exposing the substrate to the adsorbate. Semiconductor processing systems and computer program products are also described.