公开(公告)号：US20160283636A1

公开(公告)日：2016-09-29

申请号：US15171560

申请日：2016-06-02

Applicant: Altera Corporation

Inventor： Kalen B. Brunham ,  Gordon Raymond Chiu ,  Joshua David Fender

IPC: G06F17/50 ,  H03K19/177

CPC classification number: G06F17/5072 ,  G06F17/505 ,  G06F17/5054 ,  G06F17/5077 ,  H03K19/17756 ,  H03K19/1776

Abstract: A programmable circuit includes a physical interface at an input output (IO) periphery of the programmable circuit. The programmable circuit also includes a partial reconfigurable (PR) module, at the IO periphery of the programmable circuit, to implement a sequencer unit operable to configure the physical interface during a first instance of the PR module, and a controller unit operable to translate commands to the physical interface during a second instance of the PR module.

Abstract translation: 可编程电路包括在可编程电路的输入输出（IO）外围的物理接口。 可编程电路还包括在可编程电路的IO周边的部分可重新配置（PR）模块，以实现可在PR模块的第一实例期间配置物理接口的定序器单元，以及可操作以将命令 在PR模块的第二个实例期间到物理接口。

公开(公告)号：US20130263070A1

公开(公告)日：2013-10-03

申请号：US13902813

申请日：2013-05-25

Applicant: Altera Corporation

Inventor： Kalen B. Brunham ,  Gordon Raymond Chiu ,  Joshua David Fender

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/505 ,  G06F17/5054 ,  G06F17/5077 ,  H03K19/17756 ,  H03K19/1776

Abstract: A programmable circuit includes a physical interface at an input output (IO) periphery of the programmable circuit. The programmable circuit also includes a partial reconfigurable (PR) module, at the IO periphery of the programmable circuit, to implement a sequencer unit operable to configure the physical interface during a first instance of the PR module, and a controller unit operable to translate commands to the physical interface during a second instance of the PR module.

Abstract translation: 可编程电路包括在可编程电路的输入输出（IO）外围的物理接口。 可编程电路还包括在可编程电路的IO周边的部分可重新配置（PR）模块，以实现可在PR模块的第一实例期间配置物理接口的定序器单元，以及可操作以将命令 在PR模块的第二个实例期间到物理接口。

公开(公告)号：US10096349B2

公开(公告)日：2018-10-09

申请号：US15156186

申请日：2016-05-16

Applicant: Altera Corporation

Inventor： Ryan Fung ,  Joshua David Fender

IPC: G11C7/22 ,  G11C7/10

Abstract: An apparatus includes an interface circuit coupled to an electronic device. The interface circuit provides source synchronous communication with the electronic device using a strobe signal. The interface circuit is configured to gate the strobe signal in order to successfully communicate with the electronic device.

公开(公告)号：US20160260465A1

公开(公告)日：2016-09-08

申请号：US15156186

申请日：2016-05-16

Applicant: Altera Corporation

Inventor： Ryan Fung ,  Joshua David Fender

IPC: G11C7/22 ,  G11C7/10

CPC classification number: G11C7/222 ,  G11C7/1036 ,  G11C7/1078 ,  G11C7/1093

Abstract: An apparatus includes an interface circuit coupled to an electronic device. The interface circuit provides source synchronous communication with the electronic device using a strobe signal. The interface circuit is configured to gate the strobe signal in order to successfully communicate with the electronic device.

Abstract translation: 一种装置包括耦合到电子装置的接口电路。 接口电路使用选通信号提供与电子设备的源同步通信。 接口电路被配置为对选通信号进行门控，以便与电子设备成功通信。

公开(公告)号：US09852255B2

公开(公告)日：2017-12-26

申请号：US15171560

申请日：2016-06-02

Applicant: Altera Corporation

Inventor： Kalen B. Brunham ,  Gordon Raymond Chiu ,  Joshua David Fender

IPC: G06F17/50 ,  H03K19/177

CPC classification number: G06F17/5072 ,  G06F17/505 ,  G06F17/5054 ,  G06F17/5077 ,  H03K19/17756 ,  H03K19/1776

Abstract: A programmable circuit includes a physical interface at an input output (IO) periphery of the programmable circuit. The programmable circuit also includes a partial reconfigurable (PR) module, at the IO periphery of the programmable circuit, to implement a sequencer unit operable to configure the physical interface during a first instance of the PR module, and a controller unit operable to translate commands to the physical interface during a second instance of the PR module.

公开(公告)号：US09698794B1

公开(公告)日：2017-07-04

申请号：US14978033

申请日：2015-12-22

Applicant: Altera Corporation

Inventor： Joshua David Fender ,  Benyamin Siman-Tov

IPC: H03K19/177 ,  G06F7/38 ,  G06F3/06

CPC classification number: H03K19/1776 ,  G06F3/06 ,  G06F3/0604 ,  G06F3/0629 ,  G06F3/0638 ,  G06F3/0647 ,  G06F3/0673 ,  G06F7/38 ,  H03K19/177 ,  H03K19/17756 ,  H03K19/17796

Abstract: Systems and methods for coalescing regions on a virtualized programmable logic device are provided. A first function is configured on a first subregion on the virtualized programmable logic device. The first subregion may border an unused subregion on the programmable logic device. The first function operated on the first subregion is migrated to a second function operated on a second subregion on the virtualized programmable logic device by mapping a first set of bits configuring the first subregion to a second set of bits configuring the second subregion for the second function. The first subregion is then released from the first function. The second function is configured to perform a same task with the first function, and the first subregion and the unused subregion together form a larger unused subregion on the virtualized programmable logic device. Similarly, multiple subregions can be migrated and vacated to form a larger available region.

公开(公告)号：US09384312B2

公开(公告)日：2016-07-05

申请号：US13902813

申请日：2013-05-25

Applicant: Altera Corporation

Inventor： Kalen B. Brunham ,  Gordon Raymond Chiu ,  Joshua David Fender

IPC: G06F17/50 ,  H03K19/177

CPC classification number: G06F17/5072 ,  G06F17/505 ,  G06F17/5054 ,  G06F17/5077 ,  H03K19/17756 ,  H03K19/1776

Abstract: A programmable circuit includes a physical interface at an input output (IO) periphery of the programmable circuit. The programmable circuit also includes a partial reconfigurable (PR) module, at the IO periphery of the programmable circuit, to implement a sequencer unit operable to configure the physical interface during a first instance of the PR module, and a controller unit operable to translate commands to the physical interface during a second instance of the PR module.