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    Low-parasitic capacitance MEMS inertial sensors and related methods
    1.
    发明授权
    Low-parasitic capacitance MEMS inertial sensors and related methods 有权

    公开(公告)号：US11279614B2

    公开(公告)日：2022-03-22

    申请号：US16457865

    申请日：2019-06-28

    Applicant: Analog Devices, Inc.

    Inventor： Charles Blackmer ,  Jeffrey A. Gregory ,  Nikolay Pokrovskiy ,  Bradley C. Kaanta

    IPC: B81C1/00 ,  G01C19/5755 ,  G01P15/08

    Abstract: Microelectromechanical system (MEMS) inertial sensors exhibiting reduced parasitic capacitance are described. The reduction in the parasitic capacitance may be achieved by forming localized regions of thick dielectric material. These localized regions may be formed inside trenches. Formation of trenches enables an increase in the vertical separation between a sense capacitor and the substrate, thereby reducing the parasitic capacitance in this region. The stationary electrode of the sense capacitor may be placed between the proof mass and the trench. The trench may be filled with a dielectric material. Part of the trench may be filled with air, in some circumstances, thereby further reducing the parasitic capacitance. These MEMS inertial sensors may serve, among other types of inertial sensors, as accelerometers and/or gyroscopes. Fabrication of these trenches may involve lateral oxidation, whereby columns of semiconductor material are oxidized.

    STRESS ISOLATION PROCESS
    2.
    发明公开
    STRESS ISOLATION PROCESS 审中-公开

    公开(公告)号：US20240253979A1

    公开(公告)日：2024-08-01

    申请号：US18632802

    申请日：2024-04-11

    Applicant: Analog Devices, Inc.

    Inventor： Xin Zhang ,  Christopher Needham ,  Andrew Proudman ,  Nikolay Pokrovskiy ,  George M. Molnar, II ,  Laura Cornelia Popa

    IPC: B81C1/00 ,  B81B7/00

    CPC classification number: B81C1/00325 ,  B81B7/0048 ,  B81C1/00063 ,  B81B2203/01

    Abstract: A stress-isolated microelectromechanical systems (MEMS) device and a method of manufacture of the stress-isolated MEMS device are provided. MEMS devices may be sensitive to stress and may provide lower performance when subjected to stress. A stress-isolated MEMS device may be manufactured by etching a trench and/or a cavity in a first side of a substrate and subsequently forming a MEMS device on a surface of a platform opposite the first side of the substrate. Such a stress-isolated MEMS device may exhibit better performance than a MEMS device that is not stress-isolated. Moreover, manufacturing the MEMS device by first forming a trench and cavity on a backside of a wafer, before forming the MEMS device on a suspended platform, provides increased yield and allows for fabrication of smaller parts, in at least some embodiments.

    Low-parasitic capacitance MEMS inertial sensors and related methods
    3.
    发明授权
    Low-parasitic capacitance MEMS inertial sensors and related methods 有权

    公开(公告)号：US11746004B2

    公开(公告)日：2023-09-05

    申请号：US17668326

    申请日：2022-02-09

    Applicant: Analog Devices, Inc.

    Inventor： Charles Blackmer ,  Jeffrey A. Gregory ,  Nikolay Pokrovskiy ,  Bradley C. Kaanta

    IPC: B81C1/00 ,  G01C19/5755 ,  G01P15/08

    CPC classification number: B81C1/00063 ,  B81C1/00166 ,  G01C19/5755 ,  G01P15/0802 ,  B81B2201/0235 ,  B81B2201/0242

    Abstract: Microelectromechanical system (MEMS) inertial sensors exhibiting reduced parasitic capacitance are described. The reduction in the parasitic capacitance may be achieved by forming localized regions of thick dielectric material. These localized regions may be formed inside trenches. Formation of trenches enables an increase in the vertical separation between a sense capacitor and the substrate, thereby reducing the parasitic capacitance in this region. The stationary electrode of the sense capacitor may be placed between the proof mass and the trench. The trench may be filled with a dielectric material. Part of the trench may be filled with air, in some circumstances, thereby further reducing the parasitic capacitance. These MEMS inertial sensors may serve, among other types of inertial sensors, as accelerometers and/or gyroscopes. Fabrication of these trenches may involve lateral oxidation, whereby columns of semiconductor material are oxidized.

    LOW-PARASITIC CAPACITANCE MEMS INERTIAL SENSORS AND RELATED METHODS
    6.
    发明申请
    LOW-PARASITIC CAPACITANCE MEMS INERTIAL SENSORS AND RELATED METHODS 有权

    公开(公告)号：US20220162059A1

    公开(公告)日：2022-05-26

    申请号：US17668326

    申请日：2022-02-09

    Applicant: Analog Devices, Inc.

    Inventor： Charles Blackmer ,  Jeffrey A. Gregory ,  Nikolay Pokrovskiy ,  Bradley C. Kaanta

    IPC: B81C1/00 ,  G01C19/5755 ,  G01P15/08

    Abstract: Microelectromechanical system (MEMS) inertial sensors exhibiting reduced parasitic capacitance are described. The reduction in the parasitic capacitance may be achieved by forming localized regions of thick dielectric material. These localized regions may be formed inside trenches. Formation of trenches enables an increase in the vertical separation between a sense capacitor and the substrate, thereby reducing the parasitic capacitance in this region. The stationary electrode of the sense capacitor may be placed between the proof mass and the trench. The trench may be filled with a dielectric material. Part of the trench may be filled with air, in some circumstances, thereby further reducing the parasitic capacitance. These MEMS inertial sensors may serve, among other types of inertial sensors, as accelerometers and/or gyroscopes. Fabrication of these trenches may involve lateral oxidation, whereby columns of semiconductor material are oxidized.

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