公开(公告)号：US20040014320A1

公开(公告)日：2004-01-22

申请号：US10447255

申请日：2003-05-27

Applicant: Applied Materials, Inc.

Inventor： Ling Chen ,  Vincent W. Ku ,  Hua Chung ,  Christophe Marcadal ,  Seshadri Ganguli ,  Jenny Lin ,  Dien-Yeh Wu ,  Alan Ouye ,  Mei Chang

IPC: B01J010/00 ,  B01J010/02 ,  B01J012/00 ,  B01J012/02 ,  B01J014/00 ,  B01J015/00 ,  B01J016/00 ,  B01J019/00 ,  B32B027/04 ,  B32B027/12 ,  H01L021/302 ,  H01L021/461 ,  B32B005/02

CPC classification number: C23C16/45544 ,  C23C16/18 ,  C23C16/34 ,  C23C16/4402 ,  C23C16/4481 ,  C23C16/4482 ,  C23C16/4487 ,  Y10T117/10 ,  Y10T117/1004 ,  Y10T117/1008

Abstract: A precursor and method for filling a feature in a substrate. The method generally includes depositing a barrier layer, the barrier layer being formed from pentakis(dimethylamido)tantalum having less than about 5 ppm of chlorine. The method additionally may include depositing a seed layer over the barrier layer and depositing a conductive layer over the seed layer. The precursor generally includes pentakis(dimethylamido)tantalum having less than about 5 ppm of chlorine. The precursor is generated in a canister having a surrounding heating element configured to reduce formation of impurities.

Abstract translation: 用于填充衬底中的特征的前体和方法。 该方法通常包括沉积阻挡层，阻挡层由具有小于约5ppm氯的五（二甲基氨基）钽形成。 该方法另外可以包括在阻挡层上沉积种子层并在种子层上沉积导电层。 前体通常包括具有小于约5ppm氯的五（二甲基氨基）钽。 在具有周围加热元件的罐中产生前体，该加热元件被配置为减少杂质的形成。

公开(公告)号：US20020142589A1

公开(公告)日：2002-10-03

申请号：US09775356

申请日：2001-01-31

Applicant: Applied Materials, Inc.

Inventor： Arvind Sundarrajan ,  Suraj Rengarajan ,  Michael A. Miller ,  Peijun Ding ,  Gongda Yao ,  Christophe Marcadal ,  Ling Chen

IPC: H01L021/44

CPC classification number: H01L21/76846 ,  C23C14/024 ,  C23C14/16 ,  C23C16/34 ,  H01L21/2855 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided herein is a method of depositing alpha-tantalum film on a semiconductor wafer by depositing a tantalum nitride film on a wafer; and then depositing a tantalum film over the tantalum nitride film using wafer bias. The tantalum film as deposited is in alpha phase. Also provided is a method of depositing Cu barrier and seed layer on a semiconductor wafer, comprising the steps of depositing a tantalum nitride layer on a wafer; depositing a tantalum layer over the tantalum nitride layer using wafer bias, wherein the resulting tantalum barrier layer is in alpha phase; and then depositing Cu seed layer over the alpha-tantalum barrier layer. Further provided is a method of depositing alpha-tantalum film/layer using two-chamber process, wherein the tantalum nitride and subsequently deposited tantalum films/layers can be deposited in two separate chambers, such as IMP or SIP chambers. Still further provided is a method of depositing alpha-tantalum film by depositing PVD tantalum film on CVD films.

Abstract translation: 本文提供了一种通过在晶片上沉积氮化钽膜在半导体晶片上沉积α-钽膜的方法; 然后使用晶片偏压在钽氮化物膜上沉积钽膜。 沉积的钽膜是α相。 还提供了一种在半导体晶片上沉积Cu势垒和种子层的方法，包括以下步骤：在晶片上沉积氮化钽层; 使用晶片偏置在钽氮化物层上沉积钽层，其中所得的钽阻挡层是α相; 然后在α-钽阻挡层上沉积Cu籽晶层。 进一步提供了一种使用二室工艺沉积α-钽膜/层的方法，其中氮化钽和随后沉积的钽膜/层可以沉积在两个分离的室中，例如IMP或SIP室。 还提供了通过在CVD膜上沉积PVD钽膜来沉积α-钽膜的方法。

公开(公告)号：US20020192952A1

公开(公告)日：2002-12-19

申请号：US10208461

申请日：2002-07-30

Applicant: Applied Materials, Inc.

Inventor： Toshio Itoh ,  Michael X. Yang ,  Christophe Marcadal

IPC: H01L021/44

CPC classification number: H01L21/76846 ,  H01L21/28568 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862

Abstract: A method of forming tantalum nitride (TaN) compound layers for use in integrated circuit fabrication processes is disclosed. The tantalum nitride (TaN) compound layer is formed by thermally decomposing a tantalum containing metal organic precursor. After the tantalum nitride (TaN) compound layer is formed, it is plasma treated.

公开(公告)号：US20040197492A1

公开(公告)日：2004-10-07

申请号：US10625480

申请日：2003-07-22

Applicant: Applied Materials, Inc.

Inventor： Ling Chen ,  Christophe Marcadal ,  Hyungsuk Alexander Yoon

IPC: C23C016/34

CPC classification number: H01L21/76843 ,  H01L21/28556 ,  H01L21/76856 ,  H01L21/76862

Abstract: The present invention provides a method of forming a titanium silicon nitride barrier layer on a semiconductor wafer, comprising the steps of depositing a titanium nitride layer on the semiconductor wafer; plasma-treating the titanium nitride layer in a N2/H2 plasma; and exposing the plasma-treated titanium nitride layer to a silane ambient, wherein silicon is incorporated into the titanium nitride layer as silicon nitride thereby forming a titanium silicon nitride barrier layer. Additionally, there is provided a method of improving the barrier performance of a titanium nitride layer comprising the step of introducing silicon into the titanium nitride layer such that the silicon is incorporated into the titanium nitride layer as silicon nitride. Also provided is a method of integrating copper into a semiconductor device and a method of improving copper wettability at a copper/titanium nitride interface in a semiconductor device.

Abstract translation: 本发明提供一种在半导体晶片上形成氮化硅氮化钛阻挡层的方法，包括以下步骤：在半导体晶片上沉积氮化钛层; 在N2 / H2等离子体中等离子体处理氮化钛层; 并将等离子体处理的氮化钛层暴露于硅烷环境中，其中硅作为氮化硅结合到氮化钛层中，从而形成氮化钛氮化物阻挡层。 此外，提供了一种改善氮化钛层的阻挡性能的方法，包括将硅引入氮化钛层的步骤，使得硅作为氮化硅结合到氮化钛层中。 还提供了将铜整合到半导体器件中的方法和在半导体器件中的铜/氮化钛界面处提高铜的润湿性的方法。

公开(公告)号：US20040009336A1

公开(公告)日：2004-01-15

申请号：US10194808

申请日：2002-07-11

Applicant: Applied Materials, Inc.

Inventor： Christophe Marcadal ,  Ling Chen

IPC: B32B009/00

CPC classification number: H01L21/76843 ,  C23C16/34 ,  C23C16/45531 ,  H01L21/28562 ,  H01L21/76846 ,  Y10T428/24926

Abstract: Methods and an apparatus of forming a titanium silicon nitride (TiSiN) layer are disclosed. The titanium silicon nitride (TiSiN) layer may be formed using a cyclical deposition process by alternately adsorbing a titanium-containing precursor, a silicon-containing gas and a nitrogen-containing gas on a substrate. The titanium-containing precursor, the silicon-containing gas and the nitrogen-containing gas react to form the titanium silicon nitride (TiSiN) layer on the substrate. The formation of the titanium silicon nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, a titanium silicon nitride (TiSiN) layer may be used as a diffusion barrier for a copper metallization process.

Abstract translation: 公开了形成氮化硅钛（TiSiN）层的方法和装置。 可以通过在基板上交替吸附含钛前体，含硅气体和含氮气体的循环沉积工艺来形成氮化钛（TiSiN）层。 含钛前体，含硅气体和含氮气体反应以在衬底上形成氮化钛（TiSiN）层。 氮化钛（TiSiN）层的形成与集成电路制造工艺兼容。 在一个集成电路制造工艺中，可以使用氮化硅钛（TiSiN）层作为铜金属化工艺的扩散阻挡层。

公开(公告)号：US20030022507A1

公开(公告)日：2003-01-30

申请号：US09851519

申请日：2001-05-07

Applicant: Applied Materials, Inc.

Inventor： Ling Chen ,  Christophe Marcadal ,  Hyungsuk Alexander Yoon

IPC: H01L021/302

CPC classification number: H01L21/76843 ,  H01L21/28556 ,  H01L21/76856 ,  H01L21/76862

Abstract: The present invention provides a method of forming a titanium silicon nitride barrier layer on a semiconductor wafer, comprising the steps of depositing a titanium nitride layer on the semiconductor wafer; plasma-treating the titanium nitride layer in a N2/H2 plasma; and exposing the plasma-treated titanium nitride layer to a silane ambient, wherein silicon is incorporated into the titanium nitride layer as silicon nitride thereby forming a titanium silicon nitride barrier layer. Additionally, there is provided a method of improving the barrier performance of a titanium nitride layer comprising the step of introducing silicon into the titanium nitride layer such that the silicon is incorporated into the titanium nitride layer as silicon nitride. Also provided is a method of integrating copper into a semiconductor device and a method of improving copper wettability at a copper/titanium nitride interface in a semiconductor device.

公开(公告)号：US20020190379A1

公开(公告)日：2002-12-19

申请号：US10104842

申请日：2002-03-22

Applicant: Applied Materials, Inc.

Inventor： Ping Jian ,  Seshadri Ganguli ,  Karl A. Littau ,  Christophe Marcadal ,  Ling Chen

IPC: H01L021/44

CPC classification number: C23C16/0281 ,  C23C16/16 ,  H01L21/28556

Abstract: In accordance with the present invention, a method is provided for forming an improved tungsten layer. In one embodiment, a CVD method for depositing a tungsten layer on a substrate includes forming a bilayer of titanium-nitride/titanium (TiN/Ti) over the substrate, placing the substrate in a deposition zone of a substrate processing chamber, and introducing a fluorine-free tungsten-containing precursor and a carrier gas into the deposition zone for forming a tungsten nucleation layer over the TiN/Ti bilayer. The Ti layer is between the TiN layer and the substrate. After the tungsten nucleation formation, a process gas including a tungsten-containing source and a reduction agent are introduced into the deposition zone for forming the bulk tungsten layer. In one embodiment, the fluorine-free tungsten-containing precursor includes W(CO)6, and the carrier gas is Argon.

Abstract translation: 根据本发明，提供一种用于形成改进的钨层的方法。 在一个实施例中，用于在衬底上沉积钨层的CVD方法包括在衬底上形成氮化钛/钛（TiN / Ti）的双层，将衬底放置在衬底处理室的沉积区中，并引入 无氟含钨前体和载气进入沉积区，用于在TiN / Ti双层上形成钨成核层。 Ti层位于TiN层和衬底之间。 在钨成核形成之后，将包含含钨源和还原剂的工艺气体引入用于形成体钨层的沉积区中。 在一个实施方案中，无氟含钨前体包括W（CO）6，载气为氩。

公开(公告)号：US20020060363A1

公开(公告)日：2002-05-23

申请号：US10052681

申请日：2002-01-17

Applicant: Applied Materials, Inc.

Inventor： Ming Xi ,  Paul Frederick Smith ,  Ling Chen ,  Michael X. Yang ,  Mei Chang ,  Fusen Chen ,  Christophe Marcadal ,  Jenny C. Lin

IPC: H01L021/4763 ,  H01L021/44

CPC classification number: H01L21/76804 ,  C25D5/02 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.

Abstract translation: 本发明的实施例提供了用金属（例如铜）在衬底上填充图案化特征的工艺顺序和相关硬件。 序列包括首先在图案化特征中形成可靠的阻挡层，以防止金属扩散到通过其形成图案化特征的电介质层。 一个序列包括在图案化电介质上形成大致共形的阻挡层，在图案化特征的底部蚀刻阻挡层，沉积第二阻挡层，然后用诸如铜的金属填充图案化的特征。