公开(公告)号：US12125699B2

公开(公告)日：2024-10-22

申请号：US17359947

申请日：2021-06-28

Applicant: Applied Materials, Inc.

Inventor： Abhijeet S. Bagal ,  Qian Fu ,  Kuan-Ting Liu ,  Chung Liu

IPC: H01L21/02 ,  H01L21/263

CPC classification number: H01L21/02115 ,  H01L21/02274 ,  H01L21/2636

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

公开(公告)号：US20220415648A1

公开(公告)日：2022-12-29

申请号：US17359947

申请日：2021-06-28

Applicant: Applied Materials, Inc.

Inventor： Abhijeet S. Bagal ,  Qian Fu ,  Kuan-Ting Liu ,  Chung Liu

IPC: H01L21/02 ,  H01L21/263

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

公开(公告)号：US09741566B2

公开(公告)日：2017-08-22

申请号：US15043183

申请日：2016-02-12

Applicant: Applied Materials, Inc.

Inventor： Dai-Wen Tang ,  Hui Sun ,  Chung Liu ,  Benjamin Schwarz

IPC: H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31122 ,  H01L21/32137 ,  Y10S438/947

Abstract: Embodiments herein provide apparatus and methods for performing an etching process on a spacer layer with good profile control in multiple patterning processes. In one embodiment, a method for patterning a spacer layer during a multiple patterning process includes conformally forming a spacer layer on an outer surface of a patterned structure disposed on a substrate, wherein the patterned structure has having a first group of openings defined therebetween and etching the spacer layer disposed on the substrate while forming an oxidation layer on the spacer layer.

公开(公告)号：US12237149B2

公开(公告)日：2025-02-25

申请号：US17984772

申请日：2022-11-10

Applicant: Applied Materials, Inc.

Inventor： Deyang Li ,  Sunil Srinivasan ,  Yi-Chuan Chou ,  Shahid Rauf ,  Kuan-Ting Liu ,  Jason A. Kenney ,  Chung Liu ,  Olivier P. Joubert ,  Shreeram Jyoti Dash ,  Aaron Eppler ,  Michael Thomas Nichols

IPC: H01J37/00 ,  H01J37/32

Abstract: Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of an RF bias signal and a pulsed voltage waveform to one or more electrodes within a plasma processing chamber. The apparatus and methods disclosed herein can be useful to at least minimize or eliminate a microloading effect created while processing small dimension features that have differing densities across various regions of a substrate. The plasma processing methods and apparatus described herein are configured to improve the control of various characteristics of the generated plasma and control an ion energy distribution (IED) of the plasma generated ions that interact with a surface of a substrate during plasma processing. The ability to synchronize and control waveform characteristics of a voltage waveform bias established on a substrate during processing allows for an improved control of the generated plasma and process of forming, for example, high-aspect ratio features in the surface of the substrate by a reactive ion etching process. As a result, greater precision for plasma processing can be achieved, which is described herein in more detail.

公开(公告)号：US20240420948A1

公开(公告)日：2024-12-19

申请号：US18816702

申请日：2024-08-27

Applicant: Applied Materials, Inc.

Inventor： Abhijeet S. Bagal ,  Qian Fu ,  Kuan-Ting Liu ,  Chung Liu

IPC: H01L21/02 ,  H01L21/263

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.