DIFFUSION LAYERS IN METAL INTERCONNECTS

    公开(公告)号:US20230077737A1

    公开(公告)日:2023-03-16

    申请号:US17474394

    申请日:2021-09-14

    Abstract: Exemplary methods of plating are described. The methods may include contacting a patterned substrate with a plating bath in a plating chamber. The patterned substrate includes at least one metal interconnect with a contact surface that is exposed to the plating bath. The metal interconnect is made of a first metal characterized by a first reduction potential. The methods further include plating a diffusion layer on the contact surface of the metal interconnect. The diffusion layer is made of a second metal characterized by a second reduction potential that is larger than the first reduction potential of the first metal in the metal interconnects. The plating bath also includes one or more ions of the second metal and a grain refining compound that reduces the formation of pinhole defects in the diffusion layer.

    Methods for bonding substrates
    4.
    发明授权

    公开(公告)号:US11309278B2

    公开(公告)日:2022-04-19

    申请号:US16520680

    申请日:2019-07-24

    Abstract: Methods for bonding substrates used, for example, in substrate-level packaging, are provided herein. In some embodiments, a method for bonding substrates includes: performing electrochemical deposition (ECD) to deposit at least one material on each of a first substrate and a second substrate, performing chemical mechanical polishing (CMP) on the first substrate and the second substrate to form a bonding interface on each of the first substrate and the second substrate, positioning the first substrate on the second substrate so that the bonding interface on the first substrate aligns with the bonding interface on the second substrate, and bonding the first substrate to the second substrate using the bonding interface on the first substrate and the bonding interface on the second substrate.

    METHODS FOR DEPOSITING DIELECTRIC FILMS WITH INCREASED STABILITY

    公开(公告)号:US20240332005A1

    公开(公告)日:2024-10-03

    申请号:US18192563

    申请日:2023-03-29

    CPC classification number: H01L21/02211 H01L21/02167 H01L21/0234

    Abstract: Embodiments include semiconductor processing methods to form dielectric films on semiconductor substrates are described. The methods may include providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The methods may include providing an inert precursor to the processing region of the semiconductor processing chamber. The methods may include generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor. The methods may include depositing a silicon-containing material on the substrate.

    Methods for forming alignment marks

    公开(公告)号:US11899376B1

    公开(公告)日:2024-02-13

    申请号:US17900124

    申请日:2022-08-31

    CPC classification number: G03F7/70633 G03F9/7088

    Abstract: A method for forming alignment marks leverages pad density and critical dimensions (CDs). In some embodiments, the method includes forming first and second alignment marks on a first substrate and a second substrate where the alignment marks have a width within 5% of the associated CD of copper pads on the respective substrates and forming a first and second dummy patterns around the first and second alignment marks. The first and second dummy patterns have dummy pattern densities within 5% of the respective copper pad density of the first and second substrates and CDs within 5% of the respective copper pad CDs. In some embodiments, alignment marks with physical dielectric material protrusions and recesses on opposite substrate surfaces may further enhance bonding.

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