公开(公告)号：US20240363390A1

公开(公告)日：2024-10-31

申请号：US18540680

申请日：2023-12-14

Applicant: Applied Materials, Inc.

Inventor： Xinning LUAN ,  Shawn THOMAS ,  Hui CHEN

IPC: H01L21/687 ,  C23C16/458 ,  C30B25/10 ,  C30B25/12

CPC classification number: H01L21/68735 ,  C23C16/4586 ,  C30B25/10 ,  C30B25/12 ,  H01L21/68742

Abstract: The present disclosure relates to gas flow substrate supports, processing chambers, and related methods and apparatus, for semiconductor manufacturing. In one or more embodiments, a substrate support applicable for semiconductor manufacturing includes a first outer surface, a ledge disposed inwardly of the first outer surface and recessed relative to the first outer surface, and a pocket defining a pocket surface that is disposed inwardly of the ledge and recessed relative to the ledge. The substrate support includes a plurality of first flow openings extending into the pocket surface, a plurality of second flow openings extending into the ledge, and a plurality of third flow openings extending into the first outer surface.

公开(公告)号：US20240363354A1

公开(公告)日：2024-10-31

申请号：US18636449

申请日：2024-04-16

Applicant: Applied Materials, Inc.

Inventor： He REN ,  Raman GAIRE ,  Shi YOU ,  Pranav RAMESH ,  Houssam LAZKANI ,  Shawn THOMAS ,  Abhishek DUBE ,  Mehul B. NAIK ,  Songkram Sonny SRIVATHANAKUL

IPC: H01L21/285 ,  C30B25/18 ,  C30B29/06 ,  C30B29/68 ,  H01L21/768 ,  H01L29/40

CPC classification number: H01L21/28518 ,  C30B25/18 ,  C30B29/06 ,  C30B29/68 ,  H01L21/768 ,  H01L29/401

Abstract: Semiconductor devices and methods for manufacturing the same are provided. The method includes epitaxially growing a doped crystalline silicon-containing layer over a source/drain feature and growing a doped amorphous silicon-containing layer over a field region of a semiconductor layer. The trench is formed in the semiconductor layer and the trench exposes the source/drain feature. The method further includes epitaxially growing an undoped crystalline silicon-containing capping layer over the doped crystalline silicon-containing layer and growing an undoped amorphous silicon-containing layer over the doped silicon-containing amorphous layer. The method further includes selectively removing the doped amorphous silicon-containing layer and the undoped amorphous silicon-containing layer relative to the silicon-containing crystalline capping layer. The method further includes removing the silicon-containing crystalline capping layer to expose the doped silicon-containing crystalline layer.

公开(公告)号：US20220220635A1

公开(公告)日：2022-07-14

申请号：US17146572

申请日：2021-01-12

Applicant: Applied Materials, Inc.

Inventor： Yen Lin LEOW ,  Xinning LUAN ,  Hui CHEN ,  Kirk Allen FISHER ,  Shawn THOMAS

IPC: C30B25/16 ,  C30B29/36 ,  C30B25/10 ,  C30B25/18 ,  C30B29/68

Abstract: Embodiments of the present disclosure generally relate to silicon carbide coated base substrates, silicon carbide substrates thereof, and methods for forming silicon carbide coated base substrates. In some embodiments, a method includes introducing a first silicon-containing precursor to a process chamber at a first temperature of about 800° C. to less than 1,000° C. to form a first silicon carbide layer on a base substrate. The method includes introducing a second silicon-containing precursor, that is the same or different than the first silicon-containing precursor, to the process chamber at a second temperature of about 1,000° C. to about 1,400° C. to form a second silicon carbide layer on the first silicon carbide layer.

公开(公告)号：US20240234627A1

公开(公告)日：2024-07-11

申请号：US18094765

申请日：2023-01-09

Applicant: Applied Materials, Inc.

Inventor： Abbas RASTEGAR ,  Shawn THOMAS

IPC: H01L33/08 ,  H01L33/00 ,  H01L33/24 ,  H01L33/48 ,  H01S5/0222

CPC classification number: H01L33/08 ,  H01L33/0083 ,  H01L33/24 ,  H01L33/483 ,  H01S5/0222

Abstract: The present disclosure relates to chambers, methods, apparatus, and related components for treating substrates. In one or more implementations, atomic radicals are generated using ultraviolet light, and the atomic radicals are used to treat a substrate. In one implementation, a chamber applicable for use in semiconductor manufacturing includes an internal volume defined at least partially by one or more sidewalls, one or more substrate supports disposed in the internal volume, one or more transfer openings, a gas line fluidly connecting to the internal volume from outside of the internal volume, and an ultraviolet (UV) unit. The UV unit includes one or more UV light sources configured to generate UV light having a wavelength that is within a range of 170 nm to 254 nm.

公开(公告)号：US20240088222A1

公开(公告)日：2024-03-14

申请号：US17943137

申请日：2022-09-12

Applicant: Applied Materials, Inc.

Inventor： Shawn THOMAS ,  Saurabh CHOPRA ,  John TOLLE

IPC: H01L29/08 ,  C23C16/22 ,  C23C16/56 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/0847 ,  C23C16/22 ,  C23C16/56 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02598 ,  H01L21/02661 ,  H01L21/02672 ,  H01L21/02675 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/78696

Abstract: A processing system includes one or more processing chambers, and a system controller configured to cause the processing system to perform (a) a pre-clean process on exposed surfaces of a semiconductor structure, the semiconductor structure comprising a first semiconductor region, a second semiconductor region separated from the first semiconductor region by a trench, and a dielectric layer over at least a portion of the first semiconductor region and the second semiconductor region, (b) a first deposition process to form an amorphous silicon-containing layer on the exposed surfaces of the semiconductor structure, (c) a recrystallization anneal process to recrystallize at least a portion of the amorphous silicon-containing layer to form a silicon-containing crystalline layer within the trench, (d) an etch process to remove remaining portions of the amorphous silicon-containing layer, and (e) a second deposition process, to epitaxially form a source/drain region over the silicon-containing crystalline layer within the trench.

公开(公告)号：US20240145468A1

公开(公告)日：2024-05-02

申请号：US18381307

申请日：2023-10-18

Applicant: Applied Materials, Inc.

Inventor： Shawn THOMAS

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L27/088 ,  H01L21/76224 ,  H01L21/823418 ,  H01L21/823481 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: Gate-all-around transistor devices and methods for manufacturing the same are provided. The semiconductor device includes a substrate. The substrate includes a plurality of isolation regions formed in the substrate, the plurality of isolation regions comprising an isolation material. The substrate further includes a buffer region formed in the substrate, the buffer region separating adjacent isolation regions. The semiconductor device further includes a plurality of fins, each fin formed on a corresponding isolation region of the plurality of isolation regions. Each fin includes a buffer layer contacting the isolation material and a plurality of silicon layers and a plurality of silicon germanium layers alternatingly arranged in a plurality of stacked pairs on the buffer layer.

公开(公告)号：US20240052521A1

公开(公告)日：2024-02-15

申请号：US18492482

申请日：2023-10-23

Applicant: Applied Materials, Inc.

Inventor： Yen Lin LEOW ,  Xinning LUAN ,  Hui CHEN ,  Kirk Allen FISHER ,  Shawn THOMAS

IPC: C30B25/16 ,  C30B29/36 ,  C30B29/68 ,  C30B25/18 ,  C30B25/10

CPC classification number: C30B25/16 ,  C30B29/36 ,  C30B29/68 ,  C30B25/18 ,  C30B25/10

Abstract: Embodiments of the present disclosure generally relate to silicon carbide coated base substrates, silicon carbide substrates thereof, and methods for forming silicon carbide coated base substrates. In some embodiments, a method includes introducing a first silicon-containing precursor to a process chamber at a first temperature of about 800° C. to less than 1,000° C. to form a first silicon carbide layer on a base substrate. The method includes introducing a second silicon-containing precursor, that is the same or different than the first silicon-containing precursor, to the process chamber at a second temperature of about 1,000° C. to about 1,400° C. to form a second silicon carbide layer on the first silicon carbide layer.

公开(公告)号：US20240274464A1

公开(公告)日：2024-08-15

申请号：US18108272

申请日：2023-02-10

Applicant: Applied Materials, Inc.

Inventor： Matthew Gabriel GOODMAN ,  John TOLLE ,  Shawn THOMAS ,  Lori D. WASHINGTON ,  Xinning LUAN ,  Zhepeng CONG

IPC: H01L21/687

CPC classification number: H01L21/68757 ,  H01L21/68785

Abstract: A susceptor for processing a substrate is provided including a base and a coating formed over the base. The base includes an outer rim having an inner edge, an outer edge, and a top connecting the inner edge to the outer edge; and an inner dish disposed inside the outer rim and coupled to the outer rim, the inner dish recessed from the top of the outer rim, the inner dish having a front side and an opposing back side. The coating has an outer surface that includes a first portion formed over the front side of the inner dish. The first portion of the outer surface of the coating includes a first region and a second region, the first region has a first average level of roughness, the second region has a second average level of roughness.

公开(公告)号：US20240145241A1

公开(公告)日：2024-05-02

申请号：US18383100

申请日：2023-10-24

Applicant: Applied Materials, Inc.

Inventor： Joe MARGETIS ,  John TOLLE ,  Shawn THOMAS

IPC: H01L21/02 ,  H01L21/3065

CPC classification number: H01L21/02639 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/3065

Abstract: Method of forming a semiconductor device are provided. In some implementations, the method includes positioning a substrate into a processing chamber, the substrate having an exposed non-crystalline surface and an exposed crystalline surface. The method further includes heating the processing chamber to a temperature for deposition. The method further includes injecting a pre-treatment gas into the processing chamber. The pre-treatment gas comprises a molecule that acts to lower interfacial energy between the exposed non-crystalline surface and the exposed crystalline surface. The method further includes injecting a deposition gas into the processing chamber to selectively grow an n-type doped epitaxial silicon layer on the exposed crystalline surface.