公开(公告)号：US20240339358A1

公开(公告)日：2024-10-10

申请号：US18131956

申请日：2023-04-07

Applicant: Applied Materials, Inc.

Inventor： Jesus Candelario Mendoza-Gutierrez ,  Aaron Dangerfield ,  Bhaskar Jyoti Bhuyan ,  Mark Saly ,  Yang Zhou ,  Yong Jin Kim ,  Carmen Leal Cervantes ,  Ge Qu ,  Zhiyuan Wu ,  Feng Chen ,  Kevin Kashefi

IPC: H01L21/768 ,  C23C16/18 ,  C23C16/455 ,  C23C16/56

CPC classification number: H01L21/76846 ,  C23C16/18 ,  C23C16/45527 ,  C23C16/56 ,  H01L21/76877

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap. The SAM has a general formula I to XIX, wherein R, R′, R1, R2, R3, R4, and R5 are independently selected from hydrogen (H), alkyl, alkene, alkyne, and aryl, n is from 1 to 20, m is from 1 to 20, x is from 1 to 2, and y is from 1 to 2. A barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20240420996A1

公开(公告)日：2024-12-19

申请号：US18209035

申请日：2023-06-13

Applicant: Applied Materials, Inc.

Inventor： Jiajie Cen ,  Zhiyuan Wu ,  Kevin Kashefi ,  Yong Jin Kim ,  Yang Zhou ,  Zheng Ju

IPC: H01L21/768 ,  H01J37/32 ,  H01L21/311

Abstract: Methods of forming microelectronic devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include forming a hardmask on the dielectric layer; selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap and on the hardmask; treating the microelectronic device with a plasma to remove the self-assembled monolayer (SAM) from the hardmask; forming a barrier layer on the dielectric layer and on the hardmask; selectively depositing a metal liner on the barrier layer on the sidewall; and performing a gap fill process on the metal liner.

公开(公告)号：US20230253248A1

公开(公告)日：2023-08-10

申请号：US18119080

申请日：2023-03-08

Applicant: Applied Materials, Inc.

Inventor： Yang Zhou ,  Yong Jin Kim ,  Ge Qu ,  Zhiyuan Wu ,  Carmen Leal Cervantes ,  Feng Chen ,  Kevin Kashefi ,  Bhaskar Jyoti Bhuyan ,  Drew Phillips ,  Aaron Dangerfield

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76844 ,  H01L21/76846 ,  H01L23/5226 ,  H01L21/28568

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap. The SAM comprises a hydrocarbon having a formula of H—C≡C—R, wherein R is a linear alkyl chain or aryl group comprising from 1 to 20 carbon atoms or a formula of R′C═CR″, wherein R′ and R″ independently include a linear alkyl chain or aryl group comprising from 1 to 20 carbon atoms A barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20240420997A1

公开(公告)日：2024-12-19

申请号：US18211502

申请日：2023-06-19

Applicant: Applied Materials, Inc.

Inventor： Yang Zhou ,  Jiajie Cen ,  Zhiyuan Wu ,  Ge Qu ,  Yong Jin Kim ,  Zheng Ju ,  Feng Chen ,  Kevin Kashefi

IPC: H01L21/768

Abstract: Methods of forming devices comprise forming a dielectric material on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include passivating a metal material at a bottom of the gap with an alkyl reactant to form a passivation layer on the metal material, the gap defined by the bottom and sidewalls comprising the dielectric material with having a barrier layer thereon. A metal liner is selectively deposited on the barrier layer on the sidewall over the passivation layer on the bottom.

公开(公告)号：US20240332075A1

公开(公告)日：2024-10-03

申请号：US18613918

申请日：2024-03-22

Applicant: Applied Materials, Inc.

Inventor： Jiajie Cen ,  Kevin Kashefi ,  Zhiyuan Wu ,  Yang Zhou ,  Yong Jin Kim ,  Carmen Leal Cervantes ,  Ge Qu ,  Zheng Ju

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76844 ,  H01L21/76846 ,  H01L23/5226 ,  H01L21/76882 ,  H01L23/53209 ,  H01L23/53238

Abstract: Methods of forming microelectronic devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include selectively depositing a first self-assembled monolayer (SAM) on the bottom of the gap; forming a barrier layer on the dielectric layer; selectively depositing a second self-assembled monolayer (SAM) on the barrier layer and on the bottom of the gap; treating the microelectronic device with a plasma to remove a first portion of the second self-assembled monolayer (SAM); selectively depositing a metal liner on the barrier layer on the sidewall; removing a second portion of the second self-assembled monolayer (SAM); and performing a gap fill process on the metal liner.

公开(公告)号：US20240258103A1

公开(公告)日：2024-08-01

申请号：US18422656

申请日：2024-01-25

Applicant: Applied Materials, Inc.

Inventor： Jiajie Cen ,  Ge Qu ,  Shinjae Hwang ,  Zheng Ju ,  Yang Zhou ,  Zhiyuan Wu ,  Feng Chen ,  Kevin Kashefi

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02274 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843

Abstract: Embodiments of the disclosure relate to methods for forming electrical interconnects. Additional embodiments provide methods of forming and treating barrier and liner layers to improve film and material properties. In some embodiments, the resulting composite layers provide improved resistivity, decrease void formation and improve device reliability.