公开(公告)号：US20240381675A1

公开(公告)日：2024-11-14

申请号：US18649730

申请日：2024-04-29

Applicant: Applied Materials, Inc.

Inventor： Yongkee Chae ,  Yong Jin Kim ,  Cheng-Pei Ouyang ,  Su-Ho Cho

IPC: H10K39/15 ,  H10K30/57 ,  H10K30/88 ,  H10K39/10

Abstract: A method includes obtaining a set of tandem solar cell devices, and forming, on each tandem solar cell device of the set of tandem solar cell devices using a deposition process, a discrete encapsulation layer along an upper surface and side surfaces of the tandem solar cell device.

公开(公告)号：US20240355675A1

公开(公告)日：2024-10-24

申请号：US18630177

申请日：2024-04-09

Applicant: Applied Materials, Inc.

Inventor： Muthukumar Kaliappan ,  Yong Jin Kim ,  Carmen Leal Cervantes ,  Bhaskar Jyoti Bhuyan ,  Xiangjin Xie ,  Michael Haverty ,  Kevin Kashefi ,  Mark Saly ,  Aaron Dangerfield ,  Jesus Candelario Mendoza-Gutierrez

IPC: H01L21/768

CPC classification number: H01L21/76846 ,  H01L21/76879

Abstract: Methods of forming semiconductor devices by enhancing selective deposition are described. In some embodiments, a blocking layer is deposited on a metal surface before deposition of a barrier layer. The methods include exposing a substrate with a metal surface, a dielectric surface and an aluminum oxide surface or an aluminum nitride surface to a blocking molecule, such as a boron-containing compound, to form the blocking layer selectively on the metal surface over the dielectric surface and one of the aluminum oxide surface or the aluminum nitride surface.

公开(公告)号：US20240258164A1

公开(公告)日：2024-08-01

申请号：US18418786

申请日：2024-01-22

Applicant: Applied Materials, Inc.

Inventor： Jiajie Cen ,  Carmen Leal Cervantes ,  Yong Jin Kim ,  Kevin Kashefi ,  Xiaodong Wang

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76844 ,  H01L21/02063

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A pre-clean process is performed before a self-assembled monolayer (SAM) is formed on the bottom of the gap. A barrier layer is selectively deposited on the sidewalls but not on the bottom of the gap. The SAM is removed after selectively depositing the barrier layer on the sidewalls.

公开(公告)号：US20250112090A1

公开(公告)日：2025-04-03

申请号：US18979075

申请日：2024-12-12

Applicant: Applied Materials, Inc.

Inventor： Ge Qu ,  Zhiyuan Wu ,  Feng Chen ,  Carmen Leal Cervantes ,  Yong Jin Kim ,  Kevin Kashefi ,  Xianmin Tang ,  Wenjing Xu ,  Lu Chen ,  Tae Hong Ha

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20230072614A1

公开(公告)日：2023-03-09

申请号：US17466732

申请日：2021-09-03

Applicant: Applied Materials, Inc.

Inventor： Ge Qu ,  Zhiyuan Wu ,  Feng Chen ,  Carmen Leal Cervantes ,  Yong Jin Kim ,  Kevin Kashefi ,  Xianmin Tang

IPC: H01L21/768

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20240339358A1

公开(公告)日：2024-10-10

申请号：US18131956

申请日：2023-04-07

Applicant: Applied Materials, Inc.

Inventor： Jesus Candelario Mendoza-Gutierrez ,  Aaron Dangerfield ,  Bhaskar Jyoti Bhuyan ,  Mark Saly ,  Yang Zhou ,  Yong Jin Kim ,  Carmen Leal Cervantes ,  Ge Qu ,  Zhiyuan Wu ,  Feng Chen ,  Kevin Kashefi

IPC: H01L21/768 ,  C23C16/18 ,  C23C16/455 ,  C23C16/56

CPC classification number: H01L21/76846 ,  C23C16/18 ,  C23C16/45527 ,  C23C16/56 ,  H01L21/76877

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap. The SAM has a general formula I to XIX, wherein R, R′, R1, R2, R3, R4, and R5 are independently selected from hydrogen (H), alkyl, alkene, alkyne, and aryl, n is from 1 to 20, m is from 1 to 20, x is from 1 to 2, and y is from 1 to 2. A barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20240258161A1

公开(公告)日：2024-08-01

申请号：US18418812

申请日：2024-01-22

Applicant: Applied Materials, Inc.

Inventor： Yong Jin Kim ,  Carmen Leal Cervantes ,  Kevin Kashefi ,  Xingye Wang

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76831 ,  H01L21/76826 ,  H01L21/76843 ,  H01L21/76868 ,  H01L23/53238 ,  H01L23/53266

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap which resists degradation when exposed to the ambient atmosphere. A barrier layer is selectively deposited on the sidewalls but not on the bottom of the gap. The SAM is removed after selectively depositing the barrier layer on the sidewalls.

公开(公告)号：US12211743B2

公开(公告)日：2025-01-28

申请号：US17466732

申请日：2021-09-03

Applicant: Applied Materials, Inc.

Inventor： Ge Qu ,  Zhiyuan Wu ,  Feng Chen ,  Carmen Leal Cervantes ,  Yong Jin Kim ,  Kevin Kashefi ,  Xianmin Tang ,  Wenjing Xu ,  Lu Chen ,  Tae Hong Ha

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20240420997A1

公开(公告)日：2024-12-19

申请号：US18211502

申请日：2023-06-19

Applicant: Applied Materials, Inc.

Inventor： Yang Zhou ,  Jiajie Cen ,  Zhiyuan Wu ,  Ge Qu ,  Yong Jin Kim ,  Zheng Ju ,  Feng Chen ,  Kevin Kashefi

IPC: H01L21/768

Abstract: Methods of forming devices comprise forming a dielectric material on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include passivating a metal material at a bottom of the gap with an alkyl reactant to form a passivation layer on the metal material, the gap defined by the bottom and sidewalls comprising the dielectric material with having a barrier layer thereon. A metal liner is selectively deposited on the barrier layer on the sidewall over the passivation layer on the bottom.

公开(公告)号：US20240332075A1

公开(公告)日：2024-10-03

申请号：US18613918

申请日：2024-03-22

Applicant: Applied Materials, Inc.

Inventor： Jiajie Cen ,  Kevin Kashefi ,  Zhiyuan Wu ,  Yang Zhou ,  Yong Jin Kim ,  Carmen Leal Cervantes ,  Ge Qu ,  Zheng Ju

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76844 ,  H01L21/76846 ,  H01L23/5226 ,  H01L21/76882 ,  H01L23/53209 ,  H01L23/53238

Abstract: Methods of forming microelectronic devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include selectively depositing a first self-assembled monolayer (SAM) on the bottom of the gap; forming a barrier layer on the dielectric layer; selectively depositing a second self-assembled monolayer (SAM) on the barrier layer and on the bottom of the gap; treating the microelectronic device with a plasma to remove a first portion of the second self-assembled monolayer (SAM); selectively depositing a metal liner on the barrier layer on the sidewall; removing a second portion of the second self-assembled monolayer (SAM); and performing a gap fill process on the metal liner.