公开(公告)号：US11924959B2

公开(公告)日：2024-03-05

申请号：US17724353

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0203 ,  H05K1/0215 ,  H05K1/111 ,  H05K2201/066 ,  H05K2201/093

Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.

公开(公告)号：US12213252B2

公开(公告)日：2025-01-28

申请号：US17724326

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/11 ,  H05K1/02

Abstract: A CPU includes a processor die and a substrate. The processor die includes first signal contacts, power contacts, and ground contacts. The processor die is affixed and electrically coupled to the substrate on a first surface of the substrate. The substrate routes the first signal contacts to associated second signal contacts on a second surface of the substrate. The substrate further routes a subset of the power contacts to a power pad on the first surface of the substrate, and routes a subset of the ground contacts to a ground pad on the first surface of the substrate.

公开(公告)号：US11963289B2

公开(公告)日：2024-04-16

申请号：US17724376

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0218 ,  H05K1/0203 ,  H05K1/115 ,  H05K2201/09481

Abstract: A printed circuit board (PCB) includes an array of signal pads on a first surface of the PCB, a power contact pad on the first surface, and a ground contact pad on a second surface of the PCB. Each signal pad of the array of signal pads is associated with a signal contact of a central processing unit (CPU). The power contact pad provides power for the CPU apart from the array of signal pads. The ground contact pad provides a ground for the CPU apart from the array of signal pads.

公开(公告)号：US20240414836A1

公开(公告)日：2024-12-12

申请号：US18808233

申请日：2024-08-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/02 ,  H05K1/11

Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.

公开(公告)号：US12160945B2

公开(公告)日：2024-12-03

申请号：US18390805

申请日：2023-12-20

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/11

Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.

公开(公告)号：US20230337360A1

公开(公告)日：2023-10-19

申请号：US17724326

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/11 ,  H05K1/02

CPC classification number: H05K1/113 ,  H05K1/0215 ,  H05K2201/09481 ,  H05K2201/093

Abstract: A CPU includes a processor die and a substrate. The processor die includes first signal contacts, power contacts, and ground contacts. The processor die is affixed and electrically coupled to the substrate on a first surface of the substrate. The substrate routes the first signal contacts to associated second signal contacts on a second surface of the substrate. The substrate further routes a subset of the power contacts to a power pad on the first surface of the substrate, and routes a subset of the ground contacts to a ground pad on the first surface of the substrate.

公开(公告)号：US20230337356A1

公开(公告)日：2023-10-19

申请号：US17724376

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0218 ,  H05K1/0203 ,  H05K1/115 ,  H05K2201/09481

Abstract: A printed circuit board (PCB) includes an array of signal pads on a first surface of the PCB, a power contact pad on the first surface, and a ground contact pad on a second surface of the PCB. Each signal pad of the array of signal pads is associated with a signal contact of a central processing unit (CPU). The power contact pad provides power for the CPU apart from the array of signal pads. The ground contact pad provides a ground for the CPU apart from the array of signal pads.

公开(公告)号：US20240130033A1

公开(公告)日：2024-04-18

申请号：US18390805

申请日：2023-12-20

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0203 ,  H05K1/0215 ,  H05K1/111 ,  H05K2201/066 ,  H05K2201/093

Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.

公开(公告)号：US20230337351A1

公开(公告)日：2023-10-19

申请号：US17724353

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0203 ,  H05K1/111 ,  H05K1/0215 ,  H05K2201/066 ,  H05K2201/093

Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.

公开(公告)号：US20230335952A1

公开(公告)日：2023-10-19

申请号：US17723467

申请日：2022-04-19

Applicant: DELL PRODUCTS L.P.

Inventor： Sandor Farkas ,  Mark Smith ,  Bhyrav Mutnury

IPC: H01R13/6474 ,  H05K1/02 ,  H05K3/32 ,  H01R13/6581 ,  H01R43/20

CPC classification number: H01R13/6474 ,  H05K1/0213 ,  H05K3/32 ,  H01R13/6581 ,  H01R43/205 ,  H05K2201/10189 ,  H01R12/58

Abstract: A connector includes a connector core and ant outer shell. The connector core includes a plurality of contacts for coupling a device to a PCB, The connector core exhibits a first impedance for signals provided on the contacts. The outer shell is configured to be rigidly attached to the connector core. When the outer shell has a first configuration and is attached to the connector core, the connector exhibits a second impedance for signals provided on the contacts, the second impedance being different from the first impedance. When the outer shell has a second configuration and is attached to the connector core, the connector exhibits a third impedance for signals provided on the contacts, the third impedance being different from the first and second impedances.