CURRENT-TO-DIGITAL CONVERTER WITH WIDE DYNAMIC RANGE

    公开(公告)号:US20240291500A1

    公开(公告)日:2024-08-29

    申请号:US18584598

    申请日:2024-02-22

    CPC classification number: H03M1/48 H03M1/46

    Abstract: The present invention relates to a current-to-digital converter and the current-to-digital converter according to an example embodiment includes an integrator connected to a current source that outputs input current; a quantizer connected to the integrator and configured to generate a first digital output code corresponding to alternating current (AC) in the input current; a first loop circuit formed on a delta-sigma (ΔΣ) loop that connects an input terminal of the integrator and an output terminal of the quantizer; a second loop circuit formed on a truncation-noise-shaped baseline-servo (TNS-BS) loop that connects the input terminal of the integrator and the output terminal of the quantizer and configured to generate a second digital output code corresponding to direct current (DC) in the input current; and an adder configured to generate a final digital output code by adding the first digital output code and the second digital output code.

    CONTINUOUS-TIME DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER AND OPERATION METHOD THEREOF

    公开(公告)号:US20230261671A1

    公开(公告)日:2023-08-17

    申请号:US18168882

    申请日:2023-02-14

    CPC classification number: H03M3/484

    Abstract: Disclosed are a continuous-time delta-sigma analog-to-digital converter and an operation method thereof. More particularly, a continuous-time delta-sigma analog-to-digital converter, including: a linear integrator configured to generate a first output signal corresponding to a preset input voltage based on an operation of a linear Gm circuit that receives the preset input voltage; and a quantizer configured to generate a second output signal corresponding to the first output signal based on an operation of a body-driven VCO that receives the first output signal and to generate a digital output code corresponding to the second output signal based on an operation of a Frequency to Digital Converter (FDC) that receives the second output signal is disclosed.

    METHOD OF DETECTING MALICIOUS NODE IN BUS NETWORK SYSTEM AND NODE APPARATUS

    公开(公告)号:US20220182399A1

    公开(公告)日:2022-06-09

    申请号:US17395121

    申请日:2021-08-05

    Abstract: A method of detecting a malicious node in a bus network system includes pre-storing, by a receiving node, autocorrelation characteristics and node identifiers for each signal received from nodes excluding than the receiving node in a bus network system, receiving, by the receiving node, a target signal from any one of the nodes, generating, by the receiving node, an autocorrelation characteristic of the target signal, searching for an autocorrelation characteristic, which is identical to the autocorrelation characteristic of the target signal or similar to the autocorrelation characteristic of the target signal by a reference level or more, among the autocorrelation characteristics of each of the signals stored by the receiving node, determining, by the receiving node, whether a first node identifier matching the searched autocorrelation characteristic and a second node identifier extracted from a packet transmitted to the target signal are the same.

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