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公开(公告)号:US12206435B2
公开(公告)日:2025-01-21
申请号:US18170228
申请日:2023-02-16
Inventor: Jung Hyup Lee , Se Hwan Lee
Abstract: Disclosed is an input impedance boosting apparatus. More particularly, an input impedance boosting apparatus including an analog-to-digital converter; an input capacitor connected to an input terminal of the analog-to-digital converter and a ground line and including a first shielding metal formed thereunder; a feedback capacitor connected onto a positive feedback loop of the analog-to-digital converter and including a second shielding metal formed thereunder; and an impedance booster connected to both ends of the feedback capacitor and configured to boost an input impedance based on a first parasitic component formed between the input capacitor and the first shielding metal and a second parasitic component formed between the feedback capacitor and the second shielding metal is provided.
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公开(公告)号:US20230261670A1
公开(公告)日:2023-08-17
申请号:US18170228
申请日:2023-02-16
Inventor: Jung Hyup LEE , Se Hwan Lee
IPC: H03M3/00
CPC classification number: H03M3/458
Abstract: Disclosed is an input impedance boosting apparatus. More particularly, an input impedance boosting apparatus including an analog-to-digital converter; an input capacitor connected to an input terminal of the analog-to-digital converter and a ground line and including a first shielding metal formed thereunder; a feedback capacitor connected onto a positive feedback loop of the analog-to-digital converter and including a second shielding metal formed thereunder; and an impedance booster connected to both ends of the feedback capacitor and configured to boost an input impedance based on a first parasitic component formed between the input capacitor and the first shielding metal and a second parasitic component formed between the feedback capacitor and the second shielding metal is provided.
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公开(公告)号:US12294388B2
公开(公告)日:2025-05-06
申请号:US18168882
申请日:2023-02-14
Inventor: Jung Hyup Lee , Ji Woong Choi , Se Hwan Lee
Abstract: Disclosed are a continuous-time delta-sigma analog-to-digital converter and an operation method thereof. More particularly, a continuous-time delta-sigma analog-to-digital converter, including: a linear integrator configured to generate a first output signal corresponding to a preset input voltage based on an operation of a linear Gm circuit that receives the preset input voltage; and a quantizer configured to generate a second output signal corresponding to the first output signal based on an operation of a body-driven VCO that receives the first output signal and to generate a digital output code corresponding to the second output signal based on an operation of a Frequency to Digital Converter (FDC) that receives the second output signal is disclosed.
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