公开(公告)号：US20070267632A1

公开(公告)日：2007-11-22

申请号：US11619496

申请日：2007-01-03

Applicant: Eugene Bullock

Inventor： Eugene Bullock

IPC: G01R31/26 ,  H01L23/58

CPC classification number: G01R31/2884 ,  G01R31/305 ,  H01L22/14

Abstract: Herein are described layouts of test structures and scanning methodologies that allow large probe currents to be used so as to allow the detection of resistive defects with a resistance lower than 1 MΩ while at the same time allowing a sufficient degree of localization to be obtained for root cause failure analysis. The detection of resistances lower than 1 MΩ nominally requires a probe current greater than 1 micro ampere for detection on an electron beam inspection system.

Abstract translation: 这里描述了测试结构和扫描方法的布局，其允许使用大的探针电流，以便允许以低于1momega的电阻检测电阻性缺陷，同时允许根部获得足够的定位度 导致故障分析。 电阻低于1Mega的检测名义上需要大于1微安的探针电流，以便在电子束检查系统上进行检测。

公开(公告)号：US20060134810A1

公开(公告)日：2006-06-22

申请号：US11020639

申请日：2004-12-22

Applicant: Eugene Bullock

Inventor： Eugene Bullock

IPC: H01L21/00

CPC classification number: G01N23/20 ,  H01L21/84

Abstract: A method for electrically testing a wafer that includes: receiving a wafer having a first layer that is at least partly conductive and a second layer formed over the first layer, following production of openings in the second layer; directing towards the wafer a first set of beams of charged particles that are oriented at a first set of angles in relation to the wafer, whereas each angel of the first set of angles deviates substantially from normal, so as to pre-charge an area of the second layer without substantially pre-charging the first layer; scanning the area of the wafer by a second set of beams of charged particles that are oriented at a second set of angles in relation to the wafer, and collecting charged particles scattered from the area wafer. A system for electrically testing a semiconductor wafer, the system includes: at least one charged particle beam source; at least one detector, adapted to collect charged particles scattered from the wafer; whereas the wafer comprises a first layer that is at least partly conductive and a second layer formed over the first layer, following production of openings in the second layer; whereas the system is adapted to: (i) direct towards the wafer a first set of beams of charged particles that are oriented at a first set of angles in relation to the wafer, whereas the first angle deviates substantially from normal, so as to pre-charge an area of the second layer without substantially pre-charging the first layer; (ii) scan the area of the wafer by a second set of beams of charged particles that are oriented at a second set of angles in relation to the wafer, and collect charged particles scattered from the area wafer.

Abstract translation: 一种用于电测试晶片的方法，包括：在第二层中产生开口之后，接收具有至少部分导电的第一层的晶片和形成在第一层上的第二层; 朝向晶片引导第一组带电粒子的束，其以相对于晶片的第一组角度定向，而第一组角度的每个角度基本上偏离正常，从而预先给 所述第二层基本上不预充电所述第一层; 通过相对于晶片以第二组角度定向的第二组带电粒子扫描晶片的区域，以及收集从区域晶片散射的带电粒子。 一种用于电测试半导体晶片的系统，所述系统包括：至少一个带电粒子束源; 至少一个检测器，适于收集从所述晶片散射的带电粒子; 而所述晶片包括至少部分导电的第一层和在所述第二层中产生开口之后形成在所述第一层上的第二层; 而所述系统适于：（i）朝向所述晶片引导相对于所述晶片以第一组角度定向的第一组带电粒子束，而所述第一角度基本上偏离正常，以便于预先 - 对第二层的区域进行充电，而基本上不预充电第一层; （ii）通过相对于晶片以第二组角度定向的第二组带电粒子扫描晶片的区域，并收集从区域晶片散射的带电粒子。

公开(公告)号：US20060054816A1

公开(公告)日：2006-03-16

申请号：US10942312

申请日：2004-09-16

Applicant: Eugene Bullock

Inventor： Eugene Bullock

IPC: H01J37/28

CPC classification number: H01J37/28 ,  G01R31/305 ,  H01J37/244 ,  H01J2237/2448 ,  H01J2237/24564 ,  H01J2237/2803 ,  H01J2237/30488 ,  H01L22/12

Abstract: System and a method for electrically testing a semiconductor wafer, the method including: (a) scanning a charged particle beam along at least one scan line while maintaining an electrode located at a vicinity of the wafer at a first voltage that differs from a voltage level of a first scanned portion of the wafer, and collecting charged particles scattered from the first scanned portion; (b) scanning a charged particle beam along at least one other scan line while maintaining the electrode at a second voltage that differs from a voltage level of a second scanned portion such as to control a charging state of at least an area that comprises the first and second scanned portions; and (c) repeating the scanning stages until a predefined section of the wafer is scanned.

Abstract translation: 系统和用于电测试半导体晶片的方法，所述方法包括：（a）沿着至少一条扫描线扫描带电粒子束，同时将位于晶片附近的电极保持在不同于电压电平的第一电压 并收集从第一扫描部分散射的带电粒子; （b）沿着至少一个其他扫描线扫描带电粒子束，同时将电极保持在不同于第二扫描部分的电压电平的第二电压，以便控制至少包括第一扫描部分的区域的充电状态 和第二扫描部分; 和（c）重复扫描阶段，直到扫描晶片的预定部分。