公开(公告)号：US20150382456A1

公开(公告)日：2015-12-31

申请号：US14753165

申请日：2015-06-29

Applicant: FANUC CORPORATION

Inventor： Norihiro SAIDOU ,  Yuichi OKOUCHI

IPC: H05K1/02 ,  H05K3/34 ,  H05K1/18

CPC classification number: H05K3/3452 ,  H05K1/181 ,  H05K2201/09845 ,  H05K2203/0594 ,  H05K2203/1476

Abstract: A printed circuit board including a metal conductor formed on a surface of an insulating base material and having a component mounting portion, and a solder resist covering a part of the metal conductor, includes a thinned part on a component-mounting-portion side in the solder resist.

Abstract translation: 一种印刷电路板，包括形成在绝缘基材的表面上并具有部件安装部分的金属导体和覆盖金属导体的一部分的阻焊剂，包括在所述金属导体的部件安装部侧的薄化部分 阻焊剂

公开(公告)号：US20160227648A1

公开(公告)日：2016-08-04

申请号：US15013286

申请日：2016-02-02

Applicant: FANUC Corporation

Inventor： Takeshi SAWADA ,  Yuichi OKOUCHI ,  Daisuke MIURA

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K3/3426 ,  H05K3/305 ,  H05K2201/10772 ,  Y02P70/613

Abstract: The width of a lead-terminal connection pad on a printed wiring board is not greater than the width of a lead terminal. Therefore, a wider space can be secured between adjacent solder joints, so that bridge failure can be suppressed. Further, the length of projection of the lead-terminal connection pad at the proximal portion of the lead terminal is shorter than that of a lead-terminal connection pad on a conventional printed wiring board. Thus, a solder pool at the proximal portion of the lead terminal can be reduced to suppress bridge defect.

Abstract translation: 印刷电路板上的引线端子连接焊盘的宽度不大于引线端子的宽度。 因此，可以在相邻的焊点之间确保更宽的空间，从而可以抑制桥接故障。 此外，引线端子连接焊盘在引线端子的基端部的突出长度比传统印刷电路板上的引线端子连接焊盘的突出长度短。 因此，可以减少引线端子的近端部分的焊料池，以抑制桥接缺陷。

公开(公告)号：US20160091557A1

公开(公告)日：2016-03-31

申请号：US14867434

申请日：2015-09-28

Applicant: FANUC Corporation

Inventor： Yuichi OKOUCHI ,  Norihiro SAIDO

IPC: G01R31/28 ,  H05K3/46 ,  H05K1/02

CPC classification number: G01R31/2818 ,  G01R31/2805 ,  H05K1/0268 ,  H05K1/0296 ,  H05K3/3452 ,  H05K3/4664 ,  H05K2201/0191

Abstract: A printed board with a wiring pattern for detecting deterioration includes an insulating substrate, a wiring pattern group that is formed on the insulating substrate and includes a wiring pattern for detecting deterioration; and a solder resist covering the wiring pattern group, in which the board has a thin film section, and a thick film section in which a thickness of the solder resist is larger than the thin film section, and the wiring pattern for detecting deterioration is formed in the thin film section whose entire surrounding area or partial surrounding area is surrounded by the thick film section.

Abstract translation: 具有用于检测劣化的布线图案的印刷电路板包括绝缘基板，形成在绝缘基板上并包括用于检测劣化的布线图案的布线图案组; 以及覆盖基板具有薄膜部分的布线图案组的阻焊剂和阻焊剂的厚度大于薄膜部分的厚膜部分，形成用于检测劣化的布线图案 在其整个周围区域或部分周围区域被厚膜部分包围的薄膜部分中。