公开(公告)号：US09640477B1

公开(公告)日：2017-05-02

申请号：US15244099

申请日：2016-08-23

Applicant: FUJI XEROX CO., LTD.

Inventor： Daisuke Iguchi

IPC: H01L23/52 ,  H01L23/522 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L23/5223 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/568 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/141 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/83

Abstract: A method of producing a semiconductor package includes planarizing a surface extending from at least part of connection regions to a pair of terminals by disposing a semiconductor element and a capacitor element such that the semiconductor element and the capacitor element do not overlap each other in plan view of the semiconductor element, and by filling a portion between the semiconductor element and the capacitor element with an insulator layer; directly connecting part of the connection regions and one of the pair of terminals to a first metal layer by forming the first metal layer on top of the connection regions, on top of the pair of terminals, and on top of the insulator layer; forming a dielectric layer on top of the first metal layer; and forming a capacitor layer by forming a second metal layer on top of the dielectric layer.

公开(公告)号：US08829648B2

公开(公告)日：2014-09-09

申请号：US13755090

申请日：2013-01-31

Applicant: Fuji Xerox Co., Ltd.

Inventor： Daisuke Iguchi

IPC: H01L29/00

CPC classification number: H01L28/40 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/06 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/06134 ,  H01L2224/14134 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/00012

Abstract: A semiconductor package includes a semiconductor element, a capacitor, and a package substrate. The capacitor supplies transient current to the semiconductor element. The semiconductor element and the capacitor are mounted on the package substrate. The semiconductor element includes an integrated circuit, a first connecting part, and a second connecting part. The capacitor includes a third connecting part and a fourth connecting part. The package substrate includes a first metallic layer, a second metallic layer, and a dielectric layer. The first metallic layer includes a first conductive region, a second conductive region, a third conductive region, and a fourth conductive region. The first conductive region is connected via a fifth connecting part to the second metallic layer. The third conductive region is connected via a sixth connecting part to the second metallic layer. The second and fourth conductive regions are connected to each other inside the first metallic layer.

Abstract translation: 半导体封装包括半导体元件，电容器和封装基板。 电容器向半导体元件提供瞬态电流。 半导体元件和电容器安装在封装基板上。 半导体元件包括集成电路，第一连接部和第二连接部。 电容器包括第三连接部和第四连接部。 封装衬底包括第一金属层，第二金属层和电介质层。 第一金属层包括第一导电区域，第二导电区域，第三导电区域和第四导电区域。 第一导电区域经由第五连接部分连接到第二金属层。 第三导电区域经由第六连接部分连接到第二金属层。 第二导电区域和第四导电区域在第一金属层内部彼此连接。

公开(公告)号：US10789879B1

公开(公告)日：2020-09-29

申请号：US16719932

申请日：2019-12-18

Applicant: FUJI XEROX CO., LTD.

Inventor： Daisuke Iguchi

IPC: G09G3/32

Abstract: A light emitting device includes a board, a light emitting element that is provided on the board, a drive element that is provided on the board and drives the light emitting element, and drive wiring that is provided on the board and connects the light emitting element to the drive element, and a capacitive element that is provided inside the board such that at least a part of the capacitive element overlaps the drive wiring in plan view, and supplies a drive current to the light emitting element via internal wiring which is inside the board and faces the drive wiring.

公开(公告)号：US10340243B2

公开(公告)日：2019-07-02

申请号：US16004486

申请日：2018-06-11

Applicant: FUJI XEROX CO., LTD. ,  NODA SCREEN CO., LTD.

Inventor： Daisuke Iguchi ,  Atsunori Hattori

IPC: H01L21/48 ,  H01L23/00 ,  H01L25/00 ,  H01L25/16 ,  H01L23/492 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

Abstract: A circuit substrate includes: a base material; and a capacitor layer. The capacitor layer includes a first metal layer that is provided on the base material, a dielectric layer that is provided on the first metal layer, and a second metal layer that is provided on the dielectric layer. The first metal layer includes a first electrode region which is provided on the base material and is exposed from the dielectric layer and to which a first terminal of a capacitor element for supplying current to a circuit part through the capacitor layer is connected. The second metal layer includes a second electrode region in which the second metal layer is exposed and to which a second terminal of the capacitor element is connected.

公开(公告)号：US10020277B2

公开(公告)日：2018-07-10

申请号：US15421018

申请日：2017-01-31

Applicant: FUJI XEROX CO., LTD. ,  NODA SCREEN CO., LTD.

Inventor： Daisuke Iguchi ,  Atsunori Hattori

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/48 ,  H01L23/492 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L24/17 ,  H01L21/4875 ,  H01L23/492 ,  H01L23/5223 ,  H01L23/528 ,  H01L23/53214 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00014

Abstract: A circuit substrate includes: a base material; and a capacitor layer. The capacitor layer includes a first metal layer that is provided on the base material, a dielectric layer that is provided on the first metal layer, and a second metal layer that is provided on the dielectric layer. The first metal layer includes a first electrode region which is provided on the base material and is exposed from the dielectric layer and to which a first terminal of a capacitor element for supplying current to a circuit part through the capacitor layer is connected. The second metal layer includes a second electrode region in which the second metal layer is exposed and to which a second terminal of the capacitor element is connected.

公开(公告)号：US08913401B2

公开(公告)日：2014-12-16

申请号：US13922349

申请日：2013-06-20

Applicant: Fuji Xerox Co., Ltd.

Inventor： Daisuke Iguchi

IPC: H05K1/11 ,  H05K7/00 ,  H05K1/02 ,  H05K1/14 ,  H05K1/16 ,  H05K1/18

CPC classification number: H05K1/0243 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/162 ,  H05K1/181 ,  H05K2201/041 ,  H05K2201/09309 ,  H05K2201/09327 ,  H05K2201/09345 ,  H05K2201/09663

Abstract: A multilayer wiring board includes a signal electrode, a first power supply electrode, and a ground electrode, which are connected to a first element that outputs a signal, an electrode connected to a second element that receives the signal, a ground layer that serves as a return path for a return current of the signal, a first power supply layer that is disposed adjacent to the ground layer with a dielectric layer interposed therebetween and supplies electric power to the first element, and a second power supply layer that is provided independently of the first power supply layer and supplies electric power to the second element. The first power supply layer causes the return current to return to the first element through the first power supply electrode as a displacement current between the ground layer and the first power supply layer.

Abstract translation: 多层布线板包括信号电极，第一电源电极和接地电极，它们连接到输出信号的第一元件，连接到接收信号的第二元件的电极，用作 用于所述信号的返回电流的返回路径，与所述接地层相邻设置有电介质层并且向所述第一元件提供电力的第一电源层和与所述第一电源层独立地设置的第二电源层， 第一电源层并且向第二元件供电。 第一电源层使返回电流通过第一电源电极返回到第一元件，作为接地层和第一电源层之间的位移电流。