公开(公告)号：US10269716B2

公开(公告)日：2019-04-23

申请号：US15201337

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Vijay Kasturi ,  Ana M. Yepes ,  Chung-Hao Chen ,  Bradley A. Jackson

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/15

Abstract: Techniques and mechanisms for interconnecting circuitry disposed on a transparent substrate. In an embodiment, a multilayer circuit is bonded to the transparent substrate, the multilayer circuit including conductive traces that are variously offset at different respective levels from a side of the transparent substrate. Circuit components, such as packaged or unpackaged integrated circuit devices, are coupled each to respective input and/or output (IO) contacts of the multilayer circuit, where the conductive traces and the IO contacts interconnect the circuit components with each other. In another embodiment, the multilayer circuit is a flexible circuit that is bent to interconnect circuit components which are disposed on opposite respective sides of the transparent substrate.

公开(公告)号：US09728912B2

公开(公告)日：2017-08-08

申请号：US14962131

申请日：2015-12-08

Applicant: INTEL CORPORATION

Inventor： Vijay Kasturi

IPC: H01R9/05 ,  H01R24/50 ,  H05K1/02

CPC classification number: H01R24/50 ,  H01R12/526 ,  H01R12/53 ,  H05K1/0219 ,  H05K1/0298 ,  H05K1/117 ,  H05K1/14 ,  H05K3/32 ,  H05K2201/09236 ,  H05K2201/09481 ,  H05K2201/10189 ,  H05K2201/10356

Abstract: An adaptor board may include a multi-layer circuit board having at least three layers, namely a first board layer, a second board layer, and a third board layer. A first plurality of cable contacts may be provided at the first board layer, and a second plurality of cable contacts may be provided at the third board layer.