公开(公告)号：US10324748B2

公开(公告)日：2019-06-18

申请号：US15633497

申请日：2017-06-26

Applicant: Intel Corporation

Inventor： Yao Zu Dong ,  Zhiyuan Lv

IPC: G06F9/455 ,  G06F9/445 ,  G06F9/50 ,  G06T1/20 ,  G06F9/48

Abstract: Apparatuses, methods and storage medium associated with live migration of virtual machines (VMs) from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a virtual machine monitor (VMM) having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a graphics processor (GPU) of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser.

公开(公告)号：US09690615B2

公开(公告)日：2017-06-27

申请号：US14777316

申请日：2014-11-12

Applicant: Intel Corporation

Inventor： Yao Zu Dong ,  Zhiyuan Lv

IPC: G06F9/455 ,  G06T1/20 ,  G06F9/445 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/445 ,  G06F9/4856 ,  G06F9/50 ,  G06F9/5077 ,  G06F2009/4557 ,  G06F2009/45583 ,  G06F2209/501 ,  G06T1/20 ,  G06T2200/28

Abstract: Apparatuses, methods and storage medium associated with live migration of virtual machines (VMs) from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a virtual machine monitor (VMM) having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a graphics processor (GPU) of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser.

公开(公告)号：US11886906B2

公开(公告)日：2024-01-30

申请号：US17343078

申请日：2021-06-09

Applicant: Intel Corporation

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan Lv ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

CPC classification number: G06F9/45558 ,  G06F9/485 ,  G06F2009/45583 ,  G06F2009/45591

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

公开(公告)号：US10970129B2

公开(公告)日：2021-04-06

申请号：US16156550

申请日：2018-10-10

Applicant: Intel Corporation

Inventor： Kun Tian ,  Zhiyuan Lv ,  Yao Zu Dong

IPC: G06F9/52 ,  G06F9/48 ,  G06F9/455 ,  G06T1/20 ,  G06F9/50

Abstract: Technologies for scheduling workload submissions for a graphics processing unit (GPU) in a virtualization environment include a GPU scheduler embodied in a computing device. The virtualization environment includes a number of different virtual machines that are configured with a native graphics driver. The GPU scheduler receives GPU commands from the different virtual machines, dynamically selects a scheduling policy, and schedules the GPU commands for processing by the GPU.

公开(公告)号：US20200097313A1

公开(公告)日：2020-03-26

申请号：US16333987

申请日：2019-02-22

Applicant: INTEL CORPORATION

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan Lv ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

公开(公告)号：US20230161613A1

公开(公告)日：2023-05-25

申请号：US17535458

申请日：2021-11-24

Applicant: Intel Corporation

Inventor： Jaishankar Rajendran ,  Jun Nakajima ,  Prashant Kodali ,  Karthik Varadarajan ,  Premanand Sakarda ,  Zhiyuan Lv ,  Vaibhav Shankar

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F9/45545

Abstract: Techniques and mechanisms for a host passthrough to be performed based on the execution of a hardware identification instruction with a virtual machine (VM). In an embodiment, a hypervisor process sets a value of a control parameter corresponding to a resource of the VM. The control parameter indicates whether the VM resource is authorized to avail of a host passthrough functionality of a processor which executes the hypervisor process. The control parameter is evaluated, based on a central processing unit identification (CPUID) instruction of a guest operating system which is executed with the VM, to determine whether the CPUID instruction is to result in a host passthrough or a VM exit. In another embodiment, a shared memory resource is searched to determine whether execution of the CPUID instruction is to retrieve information without the use of either the host passthrough or the VM exit.

公开(公告)号：US11386519B2

公开(公告)日：2022-07-12

申请号：US16791904

申请日：2020-02-14

Applicant: Intel Corporation

Inventor： Kun Tian ,  Yao Zu Dong ,  Zhiyuan Lv

IPC: G06T1/20 ,  G06F9/455 ,  G06F9/48 ,  G06F9/50 ,  G06T1/60 ,  G06F9/4401

Abstract: Systems and methods for container access to graphics processing unit (GPU) resources are disclosed herein. In some embodiments, a computing system may include a physical GPU and kernel-mode driver circuitry, to communicatively couple with the physical GPU to create a plurality of emulated GPUs and a corresponding plurality of device nodes. Each device node may be associated with a single corresponding user-side container to enable communication between the user-side container and the corresponding emulated GPU. Other embodiments may be disclosed and/or claimed.

公开(公告)号：US10580105B2

公开(公告)日：2020-03-03

申请号：US15570256

申请日：2015-05-29

Applicant: Intel Corporation

Inventor： Kun Tian ,  Yao Zu Dong ,  Zhiyuan Lv

IPC: G06T1/20 ,  G06F9/455 ,  G06F9/48 ,  G06F9/50 ,  G06T1/60 ,  G06F9/4401

Abstract: Systems and methods for container access to graphics processing unit (GPU) resources are disclosed herein. In some embodiments, a computing system may include a physical GPU and kernel-mode driver circuitry, to communicatively couple with the physical GPU to create a plurality of emulated GPUs and a corresponding plurality of device nodes. Each device node may be associated with a single corresponding user-side container to enable communication between the user-side container and the corresponding emulated GPU. Other embodiments may be disclosed and/or claimed.

公开(公告)号：US11281500B2

公开(公告)日：2022-03-22

申请号：US16062568

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Jiajun Xu ,  Kun Tian ,  Zhiyuan Lv ,  Xiaowei Wang

IPC: G06F3/00 ,  G06F9/50 ,  G06T1/20 ,  G06F9/455 ,  H04L43/50 ,  H04L41/0896

Abstract: An apparatus and method are described for intelligent cloud based testing of graphics hardware and software. For example, one embodiment of an apparatus comprises: a hardware pool comprising a plurality of test machines to perform cloud-based graphics validation operations; a virtual resource pool comprising data associated a plurality of different graphics hardware resources; a resource manager to coordinate between the hardware pool and the virtual resource pool to cause one or more virtual machines (VMs) to be executed on one or more of the test machines using resources from the virtual resource pool; and a task dispatcher to dispatch graphics validation tasks to the VMs responsive to user input.

公开(公告)号：US11048542B2

公开(公告)日：2021-06-29

申请号：US16333987

申请日：2019-02-22

Applicant: INTEL CORPORATION

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan Lv ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.