Method of manufacturing a hybrid device

    公开(公告)号:US12300759B2

    公开(公告)日:2025-05-13

    申请号:US17573044

    申请日:2022-01-11

    Abstract: A method of manufacturing a micro-light-emitting diode display includes processing a wafer to form a plurality of functional chips integral with the wafer. A plurality of wafer tiles is defined in the wafer, wherein each wafer tile is composed of a cluster of functional chips. The wafer tiles are singulated by wafer dicing. A plurality of separate wafer tiles is bonded to a semiconductor wafer by hybrid bonding. The functional chips are singulated together with chips of the semiconductor wafer by dicing the bonded-together wafer tiles and semiconductor wafer.

    Semiconductor Device Arrangement with Compressible Adhesive

    公开(公告)号:US20230369181A1

    公开(公告)日:2023-11-16

    申请号:US17743601

    申请日:2022-05-13

    CPC classification number: H01L23/49534 H01L23/49503 H01L23/3142

    Abstract: A method of forming a semiconductor package includes providing a first metal substrate; and mounting a stacked arrangement on the first metal substrate, the stacked arrangement comprising a semiconductor die, wherein mounting the stacked arrangement includes: providing a first layer of attachment material between the first metal substrate and the stacked arrangement; and providing a second layer of attachment material within the stacked arrangement at an interface with the semiconductor die, wherein at least one of the first and second layers of attachment material is a compressible layer that includes one or more elastomeric elements embedded within a matrix of solder material.

    Optical projection device having a grid structure

    公开(公告)号:US12191285B2

    公开(公告)日:2025-01-07

    申请号:US17523023

    申请日:2021-11-10

    Abstract: An optical projection device and a method of producing the optical projection device are described. The optical projection device includes: a plurality of LEDs (light-emitting diodes), the LEDs each including a semiconductor mesa laterally spaced apart from one another by a grid structure. Each of the semiconductor mesas includes an n-type material and a p-type material adjoining at least partly the n-type material. The grid structure at least partly laterally surrounds at least the n-type material of each of the semiconductor mesas. The grid structure includes a conductive material that electrically interconnects the n-type material of the semiconductor mesas. The grid structure is configured to block optical crosstalk between light emitted by the LEDs.

    METHOD OF MANUFACTURING A HYBRID DEVICE

    公开(公告)号:US20220238751A1

    公开(公告)日:2022-07-28

    申请号:US17573044

    申请日:2022-01-11

    Abstract: A method of manufacturing a micro-light-emitting diode display includes processing a wafer to form a plurality of functional chips integral with the wafer. A plurality of wafer tiles is defined in the wafer, wherein each wafer tile is composed of a cluster of functional chips. The wafer tiles are singulated by wafer dicing. A plurality of separate wafer tiles is bonded to a semiconductor wafer by hybrid bonding. The functional chips are singulated together with chips of the semiconductor wafer by dicing the bonded-together wafer tiles and semiconductor wafer.

    Semiconductor device arrangement with compressible adhesive

    公开(公告)号:US12249561B2

    公开(公告)日:2025-03-11

    申请号:US17743601

    申请日:2022-05-13

    Abstract: A method of forming a semiconductor package includes providing a first metal substrate; and mounting a stacked arrangement on the first metal substrate, the stacked arrangement comprising a semiconductor die, wherein mounting the stacked arrangement includes: providing a first layer of attachment material between the first metal substrate and the stacked arrangement; and providing a second layer of attachment material within the stacked arrangement at an interface with the semiconductor die, wherein at least one of the first and second layers of attachment material is a compressible layer that includes one or more elastomeric elements embedded within a matrix of solder material.

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