公开(公告)号：US11652084B2

公开(公告)日：2023-05-16

申请号：US17078460

申请日：2020-10-23

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Gerald Ofner ,  Stephan Bradl ,  Stefan Miethaner ,  Alexander Heinrich ,  Horst Theuss ,  Peter Scherl

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L21/677 ,  H01L21/56 ,  H01L21/67 ,  H01L21/48 ,  H01L21/78

CPC classification number: H01L24/96 ,  H01L21/4825 ,  H01L21/4839 ,  H01L21/561 ,  H01L21/677 ,  H01L21/67011 ,  H01L21/67703 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/4952 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/97 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83005 ,  H01L2224/8384 ,  H01L2224/85005 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2224/97 ,  H01L2224/85 ,  H01L2224/291 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00 ,  H01L2224/92247 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00

Abstract: A method of forming a semiconductor package includes providing a panel, providing one or more metal layers on an upper surface of the panel, forming a die pad and bond pads from the one or more metal layers, the die pad being adjacent to and spaced apart from the bond pads, attaching a die to the die pad, forming electrical connections between the die and the bond pads, encapsulating the die and the electrical connections with an electrically insulating mold compound, removing portions of the panel, and exposing the die pad and the bond pads after encapsulating the die.

公开(公告)号：US11410906B2

公开(公告)日：2022-08-09

申请号：US16897804

申请日：2020-06-10

Applicant: Infineon Technologies AG

Inventor： Juergen Hoegerl ,  Bernd Betz ,  Stephan Bradl ,  Daniel Obermeier

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor package for double sided cooling includes a first and a second carrier facing each other, at least one power semiconductor chip arranged between the first and second carriers, external contacts arranged at least partially between the first and second carriers, and spring elements arranged between the first and second carriers and configured to keep the first and second carriers at a predefined distance from each other.

公开(公告)号：US20180096966A1

公开(公告)日：2018-04-05

申请号：US15284580

申请日：2016-10-04

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Gerald Ofner ,  Peter Scherl ,  Stephan Bradl ,  Stefan Miethaner ,  Alexander Heinrich ,  Horst Theuss

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel. A second packaging substrate panel is provided. The first and second packaging substrate panels are moved through an assembly line that includes a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The second type packaged semiconductor device is different than the first type packaged semiconductor device. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner.

公开(公告)号：US20210043603A1

公开(公告)日：2021-02-11

申请号：US17078460

申请日：2020-10-23

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Gerald Ofner ,  Stephan Bradl ,  Stefan Miethaner ,  Alexander Heinrich ,  Horst Theuss ,  Peter Scherl

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/677 ,  H01L21/56 ,  H01L21/67 ,  H01L21/48 ,  H01L21/78 ,  H01L23/31

Abstract: A method of forming a semiconductor package includes providing a panel, providing one or more metal layers on an upper surface of the panel, forming a die pad and bond pads from the one or more metal layers, the die pad being adjacent to and spaced apart from the bond pads, attaching a die to the die pad, forming electrical connections between the die and the bond pads, encapsulating the die and the electrical connections with an electrically insulating mold compound, removing portions of the panel, and exposing the die pad and the bond pads after encapsulating the die.

公开(公告)号：US10566309B2

公开(公告)日：2020-02-18

申请号：US15284580

申请日：2016-10-04

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Gerald Ofner ,  Peter Scherl ,  Stephan Bradl ,  Stefan Miethaner ,  Alexander Heinrich ,  Horst Theuss

IPC: H01L21/48 ,  H01L21/78 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel. A second packaging substrate panel is provided. The first and second packaging substrate panels are moved through an assembly line that includes a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The second type packaged semiconductor device is different than the first type packaged semiconductor device. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner.

公开(公告)号：US11302668B2

公开(公告)日：2022-04-12

申请号：US16720867

申请日：2019-12-19

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Gerald Ofner ,  Stephan Bradl ,  Stefan Miethaner ,  Alexander Heinrich ,  Horst Theuss ,  Peter Scherl

IPC: H01L21/677 ,  H01L21/56 ,  H01L21/67 ,  H01L21/48 ,  H01L21/78 ,  H01L23/00 ,  H01L23/495 ,  H01L23/31

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel, providing a second packaging substrate panel, and moving the first and second packaging substrate panels through an assembly line that comprises a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner. The first and second packaged semiconductor devices differ with respect to at least one of: lead configuration, and encapsulant configuration.