公开(公告)号：US20180102771A1

公开(公告)日：2018-04-12

申请号：US15834547

申请日：2017-12-07

Applicant: Integrated Device Technology, Inc.

Inventor： Zhigang Hu ,  Hui Yu ,  Shaokang Wang ,  Yuan Zhang ,  Yue Yu

IPC: H03K5/15 ,  G11C7/10

CPC classification number: H03K5/15 ,  G11C5/04 ,  G11C7/1057

Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate a plurality of delayed signals each as a copy of an input signal shifted in time by a sequence of respective delays based on a control signal. At least two of the respective delays may have a different duration. The first circuit may also be configured to change a number of driver signals that are active during each delay in the sequence of respective delays based on the input signal and the plurality of delayed signals to control a slew rate of an output signal. The second circuit may be configured to drive the output signal in response to the driver signals.

公开(公告)号：US09853632B2

公开(公告)日：2017-12-26

申请号：US15000214

申请日：2016-01-19

Applicant: Integrated Device Technology, Inc.

Inventor： Zhigang Hu ,  Hui Yu ,  Shaokang Wang ,  Yuan Zhang ,  Yue Yu

IPC: H03K5/04 ,  H03K7/08 ,  H03K5/15 ,  G11C7/10

CPC classification number: H03K5/15 ,  G11C5/04 ,  G11C7/1057

Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to (i) generate a plurality of delayed signals each as a copy of an input signal shifted in time by a sequence of respective delays based on a control signal and (ii) change a number of driver signals that are active during each delay in the sequence of respective delays based on the input signal and the plurality of delayed signals to control a slew rate of an output signal. The second circuit may be configured to drive the output signal in response to the driver signals.

公开(公告)号：US20170201243A1

公开(公告)日：2017-07-13

申请号：US15000214

申请日：2016-01-19

Applicant: Integrated Device Technology, Inc.

Inventor： Zhigang Hu ,  Hui Yu ,  Shaokang Wang ,  Yuan Zhang ,  Yue Yu

IPC: H03K5/15 ,  G11C7/10

CPC classification number: H03K5/15 ,  G11C5/04 ,  G11C7/1057

Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to (i) generate a plurality of delayed signals each as a copy of an input signal shifted in time by a sequence of respective delays based on a control signal and (ii) change a number of driver signals that are active during each delay in the sequence of respective delays based on the input signal and the plurality of delayed signals to control a slew rate of an output signal. The second circuit may be configured to drive the output signal in response to the driver signals.

公开(公告)号：US10236870B2

公开(公告)日：2019-03-19

申请号：US15834547

申请日：2017-12-07

Applicant: Integrated Device Technology, Inc.

Inventor： Zhigang Hu ,  Hui Yu ,  Shaokang Wang ,  Yuan Zhang ,  Yue Yu

IPC: G11C5/04 ,  G11C7/10 ,  H03K5/15

Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate a plurality of delayed signals each as a copy of an input signal shifted in time by a sequence of respective delays based on a control signal. At least two of the respective delays may have a different duration. The first circuit may also be configured to change a number of driver signals that are active during each delay in the sequence of respective delays based on the input signal and the plurality of delayed signals to control a slew rate of an output signal. The second circuit may be configured to drive the output signal in response to the driver signals.