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公开(公告)号：US20210409590A1
公开(公告)日：2021-12-30
申请号：US17369638
申请日：2021-07-07
Applicant: Intel Corporation
Inventor： Peter W. Winer , Krishna Kaza , Russell Scott Love , Jim Granger , Jeff Solari , Edwin Van Dalen
Abstract: Disclosed herein are electronic device display interface embodiments for controlling a camera and for reviewing images captured in the device from the camera. For example, in some embodiments, a device is provided with a display for viewing images to be captured by the camera and to provide a display interface for controlling camera operation, wherein the display interface, when in an image capture mode, is to provide an image capture button with two or more smaller image mode buttons disposed adjacent to the image capture button.
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公开(公告)号：US20210058545A1
公开(公告)日：2021-02-25
申请号：US16844410
申请日：2020-04-09
Applicant: Intel Corporation
Inventor： Peter W. Winer , Krishna Kaza , Russell Scott Love , Jim Granger , Jeff Solari , Edwin Van Dalen
Abstract: Disclosed herein are electronic device display interface embodiments for controlling a camera and for reviewing images captured in the device from the camera. For example, in some embodiments, a device is provided with a display for viewing images to be captured by the camera and to provide a display interface for controlling camera operation, wherein the display interface, when in an image capture mode, is to provide an image capture button with two or more smaller image mode buttons disposed adjacent to the image capture button.
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公开(公告)号：US10037598B2
公开(公告)日：2018-07-31
申请号：US15363870
申请日：2016-11-29
Applicant: Intel Corporation
Inventor： Amit Gur , Rakefet Kol , Edwin Van Dalen , Tamir Klein
CPC classification number: G06T5/006 , G06K9/4604 , G06T1/60 , G06T3/0093 , G06T11/60
Abstract: Techniques related to multi-block memory reads for image de-warping are discussed. Such techniques may include copying pixel data corresponding to overlapping regions of memory between adjacent image modification regions from a local buffer and retrieving pixel data corresponding to non-overlapping regions from external memory.
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公开(公告)号：US20230388622A1
公开(公告)日：2023-11-30
申请号：US18189789
申请日：2023-03-24
Applicant: Intel Corporation
Inventor： Peter W. Winer , Krishna Kaza , Russell Scott Love , Jim Granger , Jeff Solari , Edwin Van Dalen
IPC: H04N23/62 , H04N5/77 , H04N23/61 , H04N23/63 , H04N23/611 , H04N23/667
CPC classification number: H04N23/62 , H04N5/772 , H04N23/61 , H04N23/63 , H04N23/611 , H04N23/631 , H04N23/635 , H04N23/667
Abstract: Disclosed herein are electronic device display interface embodiments for controlling a camera and for reviewing images captured in the device from the camera. For example, in some embodiments, a device is provided with a display for viewing images to be captured by the camera and to provide a display interface for controlling camera operation, wherein the display interface, when in an image capture mode, is to provide an image capture button with two or more smaller image mode buttons disposed adjacent to the image capture button.
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公开(公告)号：US20180352145A1
公开(公告)日：2018-12-06
申请号：US15888824
申请日：2018-02-05
Applicant: Intel Corporation
Inventor： Peter W. Winer , Krishna Kaza , Russell Scott Love , Jim Granger , Jeff Solari , Edwin Van Dalen
CPC classification number: H04N5/23216 , H04N5/23219 , H04N5/23245 , H04N5/23293 , H04N5/772
Abstract: Disclosed herein are electronic device display interface embodiments for controlling a camera and for reviewing images captured in the device from the camera. For example, in some embodiments, a device is provided with a display for viewing images to be captured by the camera and to provide a display interface for controlling camera operation, wherein the display interface, when in an image capture mode, is to provide an image capture button with two or more smaller image mode buttons disposed adjacent to the image capture button.
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Patent Agency Ranking
公开(公告)号：US20150379666A1
公开(公告)日：2015-12-31
申请号：US14317234
申请日：2014-06-27
Applicant: Intel Corporation
Inventor： Dmitar Redzic , Aleksandar Beric , Edwin Van Dalen
CPC classification number: G06T1/20 , G06T3/0093 , G06T3/4007 , G06T2200/28
Abstract: Technologies are presented that allow efficient pixel-based image and/or video warping and scaling. An image processing system may include a memory and an accelerator unit communicatively coupled with the memory. The accelerator unit may, based on configuration settings, receive, from a memory, at least a portion of an input image as an array of neighboring four-cornered shapes; and process each shape by: determining locations of an array of output pixels delineated by four corner locations of the shape via linearization; interpolating a value of each pixel of the array of output pixels; and storing the interpolated pixel values in the memory. For warping, the array of neighboring four-cornered shapes may include an array of neighboring distorted tetragons that approximate distortion of the input image, and the interpolated pixel values may represent a warped output image. For scaling, the array of neighboring four-cornered shapes may include an array of neighboring rectangles.
Abstract translation: 提出了允许有效的基于像素的图像和/或视频翘曲和缩放的技术。 图像处理系统可以包括与存储器通信地耦合的存储器和加速器单元。 加速器单元可以基于配置设置从存储器接收输入图像的至少一部分作为相邻四角形状的阵列; 并且通过以下方式处理每个形状：通过线性化来确定由形状的四个角位置描绘的输出像素的阵列的位置; 内插输出像素阵列的每个像素的值; 以及将内插的像素值存储在存储器中。 对于翘曲，相邻的四角形状的阵列可以包括近似失真的四边形的阵列，其近似输入图像的失真，并且内插的像素值可以表示翘曲的输出图像。 对于缩放，相邻四角形状的阵列可以包括相邻矩形的阵列。
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公开(公告)号：US10749502B2
公开(公告)日：2020-08-18
申请号：US15721555
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Zoran Zivkovic , Edwin Van Dalen
Abstract: An apparatus and method for performing FIR filtering and blending operations. A processor comprising: a decode unit to decode a packed N-tap finite impulse response (FIR) filter instruction, the packed N-tap FIR filter instruction to indicate one or more source packed data operands comprising a plurality of packed data elements, at least 3 filter coefficients, and a destination storage location, the plurality of packed data elements comprising data from a signal to be filtered and the plurality of filter coefficients specifying a filter function to be applied; and an execution unit comprising an FIR unit coupled with the decode unit, the FIR unit, in response to the packed N-tap FIR filter instruction being decoded by the decode unit, to perform at least N−1 multiplications to generate at least N−1 products, each of the multiplications comprising one of the filter coefficients multiplied by one of the packed data elements, the execution unit to combine the at least N−1 products in accordance with a specified type of FIR filter being implemented to generate a result packed data element to be stored in the destination storage location.
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公开(公告)号：US10001971B2
公开(公告)日：2018-06-19
申请号：US15076118
申请日：2016-03-21
Applicant: INTEL CORPORATION
Inventor： Radomir Jakovljevic , Aleksandar Beric , Edwin Van Dalen , Dragan Milicev
CPC classification number: G06F5/08 , G06F9/3004 , G06F9/30043 , G06F9/3887 , G06F12/0207 , G06F12/04 , G06F15/8007
Abstract: An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.
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公开(公告)号：US20160277672A1
公开(公告)日：2016-09-22
申请号：US15167803
申请日：2016-05-27
Applicant: Intel Corporation
Inventor： Peter W. Winer , Krishna Kaza , Russell Scott Love , Jim Granger , Jeff Solari , Edwin Van Dalen
IPC: H04N5/232
CPC classification number: H04N5/23216 , H04N5/23219 , H04N5/23245 , H04N5/23293 , H04N5/772
Abstract: Disclosed herein are electronic device display interface embodiments for controlling a camera and for reviewing images captured in the device from the camera. For example, in some embodiments, a device is provided with a display for viewing images to be captured by the camera and to provide a display interface for controlling camera operation, wherein the display interface, when in an image capture mode, is to provide an image capture button with two or more smaller image mode buttons disposed adjacent to the image capture button.
Abstract translation: 这里公开了用于控制相机并用于从相机检查在设备中捕获的图像的电子设备显示接口实施例。 例如，在一些实施例中，设备具有用于观看由相机捕捉的图像的显示器，并且提供用于控制相机操作的显示界面，其中，当处于图像拍摄模式时，显示界面将提供 具有与图像捕获按钮相邻设置的两个或更多较小的图像模式按钮的图像捕获按钮。
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公开(公告)号：US09443281B2
公开(公告)日：2016-09-13
申请号：US14317234
申请日：2014-06-27
Applicant: Intel Corporation
Inventor： Dmitar Redzic , Aleksandar Beric , Edwin Van Dalen
CPC classification number: G06T1/20 , G06T3/0093 , G06T3/4007 , G06T2200/28
Abstract: Technologies are presented that allow efficient pixel-based image and/or video warping and scaling. An image processing system may include a memory and an accelerator unit communicatively coupled with the memory. The accelerator unit may, based on configuration settings, receive, from a memory, at least a portion of an input image as an array of neighboring four-cornered shapes; and process each shape by: determining locations of an array of output pixels delineated by four corner locations of the shape via linearization; interpolating a value of each pixel of the array of output pixels; and storing the interpolated pixel values in the memory. For warping, the array of neighboring four-cornered shapes may include an array of neighboring distorted tetragons that approximate distortion of the input image, and the interpolated pixel values may represent a warped output image. For scaling, the array of neighboring four-cornered shapes may include an array of neighboring rectangles.
Abstract translation: 提出了允许有效的基于像素的图像和/或视频翘曲和缩放的技术。 图像处理系统可以包括与存储器通信地耦合的存储器和加速器单元。 加速器单元可以基于配置设置从存储器接收输入图像的至少一部分作为相邻四角形状的阵列; 并且通过以下方式处理每个形状：通过线性化来确定由形状的四个角位置描绘的输出像素的阵列的位置; 内插输出像素阵列的每个像素的值; 以及将内插的像素值存储在存储器中。 对于翘曲，相邻的四角形状的阵列可以包括近似失真的四边形的阵列，其近似输入图像的失真，并且内插的像素值可以表示翘曲的输出图像。 对于缩放，相邻四角形状的阵列可以包括相邻矩形的阵列。
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