公开(公告)号：US12080781B2

公开(公告)日：2024-09-03

申请号：US17129867

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Noriyuki Sato ,  Sarah Atanasov ,  Abhishek A. Sharma ,  Bernhard Sell ,  Chieh-Jen Ku ,  Elliot N. Tan ,  Hui Jae Yoo ,  Travis W. Lajoie ,  Van H. Le ,  Pei-Hua Wang ,  Jason Peck ,  Tobias Brown-Heft

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/092

CPC classification number: H01L29/66795 ,  H01L21/823431 ,  H01L27/0924

Abstract: Thin film transistors fabricated using a spacer as a fin are described. In an example, a method of forming a fin transistor structure includes patterning a plurality of backbone pillars on a semiconductor substrate. The method may then include conformally depositing a spacer layer over the plurality of backbone pillars and the semiconductor substrate. A spacer etch of the spacer layer is then performed to leave a sidewall of the spacer layer on a backbone pillar to form a fin of the fin transistor structure. Other embodiments may be described and claimed.