公开(公告)号：US20250159932A1

公开(公告)日：2025-05-15

申请号：US18389427

申请日：2023-11-14

Applicant: Intel Corporation

Inventor： Chiao-Ti HUANG ,  Swapnadip GHOSH ,  Matthew PRINCE ,  Omair SAADAT ,  Yulia GOTLIB ,  Rajaram PAI ,  Reza BAYATI ,  Ryan PEARCE ,  Lin HU

IPC: H01L29/423 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Integrated circuit structures having metal gate cut plug structures are described. For example, an integrated circuit structure includes a vertical stack of horizontal nanowires. A gate electrode is over the vertical stack of horizontal nanowires. A conductive trench contact is adjacent to the gate electrode. A dielectric sidewall spacer is between the gate electrode and the conductive trench contact. A dielectric cut plug structure extends through the gate electrode, through the dielectric sidewall spacer, and through the conductive trench contact. The dielectric cut plug structure includes silicon and oxygen, with oxygen in direct contact with a metal-containing layer of the gate electrode.

公开(公告)号：US20220415925A1

公开(公告)日：2022-12-29

申请号：US17358329

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Nicholas THOMSON ,  Kalyan KOLLURU ,  Ayan KAR ,  Rui MA ,  Benjamin ORR ,  Nathan JACK ,  Biswajeet GUHA ,  Brian GREENE ,  Lin HU ,  Chung-Hsun LIN

IPC: H01L27/12 ,  H01L27/02

Abstract: Substrate-less lateral diode integrated circuit structures, and methods of fabricating substrate-less lateral diode integrated circuit structures, are described. For example, a substrate-less integrated circuit structure includes a fin or a stack of nanowires. A plurality of P-type epitaxial structures is over the fin or stack of nanowires. A plurality of N-type epitaxial structures is over the fin or stack of nanowires. One or more spacings are in locations over the fin or stack of nanowires, a corresponding one of the one or more spacings extending between neighboring ones of the plurality of P-type epitaxial structures and the plurality of N-type epitaxial structures.

公开(公告)号：US20220416022A1

公开(公告)日：2022-12-29

申请号：US17357767

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Nicholas THOMSON ,  Kalyan KOLLURU ,  Ayan KAR ,  Rui MA ,  Benjamin ORR ,  Nathan JACK ,  Biswajeet GUHA ,  Brian GREENE ,  Lin HU ,  Chung-Hsun LIN ,  Sabih OMAR

IPC: H01L29/06 ,  H01L29/423 ,  H01L27/12

Abstract: Substrate-less nanowire-based lateral diode integrated circuit structures, and methods of fabricating substrate-less nanowire-based lateral diode integrated circuit structures, are described. For example, a substrate-less integrated circuit structure includes a stack of nanowires. A plurality of P-type epitaxial structures is over the stack of nanowires. A plurality of N-type epitaxial structures is over the stack of nanowires. One or more gate structures is over the stack of nanowires. A semiconductor material is between and in contact with vertically adjacent ones of the stack of nanowires.

公开(公告)号：US20220102385A1

公开(公告)日：2022-03-31

申请号：US17033418

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Biswajeet GUHA ,  Brian GREENE ,  Avyaya JAYANTHINARASIMHAM ,  Ayan KAR ,  Benjamin ORR ,  Chung-Hsun LIN ,  Curtis TSAI ,  Kalyan KOLLURU ,  Kevin FISCHER ,  Lin HU ,  Nathan JACK ,  Nicholas THOMSON ,  Rishabh MEHANDRU ,  Rui MA ,  Sabih OMAR

IPC: H01L27/12

Abstract: Substrate-free integrated circuit structures, and methods of fabricating substrate-free integrated circuit structures, are described. For example, a substrate-less integrated circuit structure includes a fin, a plurality of gate structures over the fin, and a plurality of alternating P-type epitaxial structures and N-type epitaxial structures between adjacent ones of the plurality of gate structures.