公开(公告)号：US20240136326A1

公开(公告)日：2024-04-25

申请号：US18399189

申请日：2023-12-28

Applicant: Intel Corporation

Inventor： Wei LI ,  Edvin CETEGEN ,  Nicholas S. HAEHN ,  Ram S. VISWANATH ,  Nicholas NEAL ,  Mitul MODI

IPC: H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0652 ,  H01L21/486 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16225

Abstract: Embodiments include semiconductor packages and a method to form such semiconductor packages. A semiconductor package includes a plurality of dies on a substrate, and an encapsulation layer over the substrate. The encapsulation layer surrounds the dies. The semiconductor package also includes a plurality of dummy silicon regions on the substrate. The dummy silicon regions surround the dies and encapsulation layer. The plurality of dummy silicon regions are positioned on two or more edges of the substrate. The dummy silicon regions have a top surface substantially coplanar to a top surface of the dies. The dummy silicon regions include materials that include silicon, metals, or highly-thermal conductive materials. The materials have a thermal conductivity of approximately 120 W/mK or greater, or is equal to or greater than the thermal conductivity of silicon. An underfill layer surrounds the substrate and the dies, where the encapsulation layer surrounds portions of the underfill layer.

公开(公告)号：US20230238355A1

公开(公告)日：2023-07-27

申请号：US18127539

申请日：2023-03-28

Applicant: Intel Corporation

Inventor： Wei LI ,  Edvin CETEGEN ,  Nicholas S. HAEHN ,  Ram S. VISWANATH ,  Nicholas NEAL ,  Mitul MODI

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/78 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L21/78 ,  H01L21/486 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16225

Abstract: Embodiments include semiconductor packages and a method to form such semiconductor packages. A semiconductor package includes a plurality of dies on a substrate, and an encapsulation layer over the substrate. The encapsulation layer surrounds the dies. The semiconductor package also includes a plurality of dummy silicon regions on the substrate. The dummy silicon regions surround the dies and encapsulation layer. The plurality of dummy silicon regions are positioned on two or more edges of the substrate. The dummy silicon regions have a top surface substantially coplanar to a top surface of the dies. The dummy silicon regions include materials that include silicon, metals, or highly-thermal conductive materials. The materials have a thermal conductivity of approximately 120 W/mK or greater, or is equal to or greater than the thermal conductivity of silicon. An underfill layer surrounds the substrate and the dies, where the encapsulation layer surrounds portions of the underfill layer.

公开(公告)号：US20220103345A1

公开(公告)日：2022-03-31

申请号：US17547018

申请日：2021-12-09

Applicant: Intel Corporation

Inventor： Tomasz KANTECKI ,  Wei LI ,  Wajdi FEGHALI ,  James GUILFORD ,  Vinodh GOPAL

IPC: H04L9/06

Abstract: Methods, apparatus, and software for hashing data. The methods and apparatus employ novel improvements to hash algorithms, such as a SHA-2 hash algorithm to reduce computations and increase performance. In one aspect, calculation of SHA-2 message scheduling and SHA compression operations are separated under which an SHA-2 message schedule is applied to multiple rounds of SHA compression operations over multiple chunks of data for the data item being hashed. In another aspect, the SHA-2 message schedule is implemented such that message schedules for multiple message words or data blocks are performed in parallel. The approaches may be employed to reduce hash calculations for various purposes, including generating Filecoin nodes.

公开(公告)号：US20250106983A1

公开(公告)日：2025-03-27

申请号：US18373457

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Bohan SHAN ,  Kyle ARRINGTON ,  Dingying David XU ,  Ziyin LIN ,  Timothy GOSSELIN ,  Elah BOZORG-GRAYELI ,  Aravindha ANTONISWAMY ,  Wei LI ,  Haobo CHEN ,  Yiqun BAI ,  Jose WAIMIN ,  Ryan CARRAZZONE ,  Hongxia FENG ,  Srinivas Venkata Ramanuja PIETAMBARAM ,  Gang DUAN ,  Bin MU ,  Mohit GUPTA ,  Jeremy D. ECTON ,  Brandon C. MARIN ,  Xiaoying GUO ,  Ashay DANI

IPC: H05K1/02 ,  H05K1/03

Abstract: Embodiments disclosed herein include glass core package substrates with a stiffener. In an embodiment, an apparatus comprises a substrate with a first layer with a first width, where the first layer is a glass layer, a second layer under the first layer, where the second layer has a second width that is smaller than the first width, and a third layer over the first layer, where the third layer has a third width that is smaller than the first width. In an embodiment, the apparatus further comprises a metallic structure with a first portion and a second portion, where the first portion is over a top surface of the substrate and the second portion extends away from the first portion and covers at least a sidewall of the first layer.

公开(公告)号：US20240078702A1

公开(公告)日：2024-03-07

申请号：US17902907

申请日：2022-09-05

Applicant: Intel Corporation

Inventor： Yi LI ,  Hong Seung YEON ,  Nicholas HAEHN ,  Wei LI ,  Raquel DE SOUZA BORGES FERREIRA ,  Minglu LIU ,  Robin McREE ,  Yosuke KANAOKA ,  Gang DUAN ,  Arnab ROY

IPC: G06T7/73 ,  H01L21/68 ,  H01L23/544

CPC classification number: G06T7/74 ,  H01L21/681 ,  H01L23/544 ,  G06T2207/20081 ,  G06T2207/30204 ,  H01L2223/54426

Abstract: A method for recognizing a reference point associated with a fiducial marker including the steps of: obtaining or receiving image data of the fiducial marker; determining the degree of which the image data of the fiducial marker is aligned with one or more reference images; of which if the degree of alignment is determined to be less than an acceptable threshold predicting a set of coordinates of the reference point associated with the fiducial marker; incorporating the set of coordinates with the image data to form a modified image data; and determining the degree of which the modified image data of the fiducial marker is aligned with one or more reference images.

公开(公告)号：US20210104490A1

公开(公告)日：2021-04-08

申请号：US16596367

申请日：2019-10-08

Applicant: Intel Corporation

Inventor： Wei LI ,  Edvin CETEGEN ,  Nicholas S. HAEHN ,  Ram S. VISWANATH ,  Nicholas NEAL ,  Mitul MODI

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L21/48

Abstract: Embodiments include semiconductor packages and a method to form such semiconductor packages. A semiconductor package includes a plurality of dies on a substrate, and an encapsulation layer over the substrate. The encapsulation layer surrounds the dies. The semiconductor package also includes a plurality of dummy silicon regions on the substrate. The dummy silicon regions surround the dies and encapsulation layer. The plurality of dummy silicon regions are positioned on two or more edges of the substrate. The dummy silicon regions have a top surface substantially coplanar to a top surface of the dies. The dummy silicon regions include materials that include silicon, metals, or highly-thermal conductive materials. The materials have a thermal conductivity of approximately 120 W/mK or greater, or is equal to or greater than the thermal conductivity of silicon. An underfill layer surrounds the substrate and the dies, where the encapsulation layer surrounds portions of the underfill layer.

公开(公告)号：US20180341774A1

公开(公告)日：2018-11-29

申请号：US15778980

申请日：2015-12-24

Applicant: INTEL CORPORATION

Inventor： Jiewen YAO ,  Vincent J. ZIMMER ,  Wei LI ,  Rajesh POORNACHANDRAN ,  Giri P. MUDUSURU

IPC: G06F21/57 ,  G06F21/53 ,  G06F21/44

CPC classification number: G06F21/575 ,  G06F9/4406 ,  G06F9/547 ,  G06F21/44 ,  G06F21/53 ,  G06F21/57 ,  G06F21/572

Abstract: Techniques for providing and maintaining protection of firmware routines that form part of a chain of trust through successive processing environments. An apparatus may include a first processor component (550); a volatile storage (562) coupled to the first processor component; an enclave component to, in a pre-OS operating environment, generate a secure enclave within a portion of the volatile storage to restrict access to a secured firmware loaded into the secure enclave; a first firmware driver (646) to, in the pre-OS operating environment, provide a first API to enable unsecured firmware to call a support routine of the secured firmware from outside the secure enclave; and a second firmware driver (647) to, in an OS operating environment that replaces the pre-OS operating environment, provide a second API to enable an OS of the OS operating environment to call the support routine from outside the secure enclave.

公开(公告)号：US20220310566A1

公开(公告)日：2022-09-29

申请号：US17214083

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Xiaoqian LI ,  Wei LI ,  Santosh SHAW ,  Jingyi HUANG

IPC: H01L25/075 ,  H01L33/62 ,  G02B6/42 ,  G02B6/12 ,  H01L33/58

Abstract: Embodiments disclosed herein include photonics packages. In an embodiment, a photonics package includes a photonics die and a plurality of v-grooves on the photonics die. A barrier structure proximate the plurality of v-grooves.

公开(公告)号：US20210242107A1

公开(公告)日：2021-08-05

申请号：US16781563

申请日：2020-02-04

Applicant: Intel Corporation

Inventor： Wei LI ,  Edvin CETEGEN ,  Nicholas S. HAEHN ,  Mitul MODI ,  Nicholas NEAL

IPC: H01L23/373 ,  H01L23/00 ,  H01L23/367

Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to a substrate that includes a first region to be coupled with a die, and a second region separate and distinct from the first region that has a lower thermal conductivity than the first region, where the second region is to thermally insulate the first region when the die is coupled to the first region. The thermal insulation of the second region may be used during a TCB process to increase the quality of each of the interconnects of the die by promoting a higher temperature at the connection points to facilitate full melting of solder.