公开(公告)号：US08779564B1

公开(公告)日：2014-07-15

申请号：US13803143

申请日：2013-03-14

Applicant: Intel IP Corporation

Inventor： Mikael Knudsen ,  Thorsten Meyer ,  Saravana Maruthamuthu ,  Andreas Wolter ,  Georg Seidemann ,  Pablo Herrero ,  Pauli Jaervinen

IPC: H01L23/552 ,  H01L27/06

CPC classification number: H01L23/552 ,  H01L23/295 ,  H01L23/48 ,  H01L23/66 ,  H01L24/19 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2223/6688 ,  H01L2224/12105 ,  H01L2224/73267 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01Q1/2283 ,  H01Q9/0414 ,  H01Q9/0421 ,  H01Q23/00 ,  H01L2924/00

Abstract: A semiconductor device may include: a chip; a chip packaging structure at least partially surrounding the chip and having a receiving region configured to receive a first capacitive coupling structure; a first capacitive coupling structure disposed in the receiving region; and a second capacitive coupling structure disposed over the first capacitive coupling structure and capacitively coupled to the first capacitive coupling structure.

Abstract translation: 半导体器件可以包括：芯片; 芯片封装结构至少部分地围绕芯片并且具有被配置为接收第一电容耦合结构的接收区域; 设置在所述接收区域中的第一电容耦合结构; 以及设置在所述第一电容耦合结构上并且电容耦合到所述第一电容耦合结构的第二电容耦合结构。