公开(公告)号：US20240098907A1

公开(公告)日：2024-03-21

申请号：US18459008

申请日：2023-08-30

Applicant: JCET STATS ChipPAC Korea Limited

Inventor： HyoDong RYU ,  SeungHyun LEE ,  WonSang RHEE ,  HunTaek LEE ,  KyoungHee PARK

IPC: H05K3/34

CPC classification number: H05K3/3485 ,  H05K3/3436

Abstract: Provided is a method for forming an electronic package, comprising: providing a substrate comprising a first set of conductive pads at which a set of terminals of a first electronic component are to be mounted, respectively; forming solder paste on each of the first set of conductive pads, wherein the solder paste exposes a portion of a surface of a conductive pad that is facing away from the others of the first set of conductive pads but does not substantially expose another portion of the surface of the conductive pad that is facing towards the others of the first set of conductive pads; placing the first electronic component on the substrate with the set of terminals of the first electronic component aligned with the first set of conductive pads; reflowing the solder paste on the first set of conductive pads to secure the first electronic component onto the substrate.