公开(公告)号：US20120049351A1

公开(公告)日：2012-03-01

申请号：US13198738

申请日：2011-08-05

Applicant: JONG-JOO LEE

Inventor： JONG-JOO LEE

IPC: H01L23/498 ,  H01L23/48

CPC classification number: H05K1/111 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06152 ,  H01L2224/06154 ,  H01L2224/06179 ,  H01L2224/06517 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/1712 ,  H01L2224/17517 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/181 ,  H05K1/0271 ,  H05K3/3436 ,  H05K2201/09418 ,  H05K2201/09781 ,  H05K2201/10674 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A package substrate includes an insulating substrate, a functional pattern and a main dummy pattern. A semiconductor chip is arranged on the insulating substrate. The functional pattern is formed on the insulating substrate. The functional pattern is electrically connected to the semiconductor chip. The main dummy pattern is formed on a portion of the insulating substrate at least of to the outside of and/or adjacent the functional pattern in a path of stress generated by a difference between thermal expansion coefficient of the insulating substrate and the semiconductor chip, so as to divert the stress away from the functional pattern. Thus, the stress is not concentrated on the functional pattern. As a result, damage to the functional bump caused by the stress is prevented.

Abstract translation: 封装基板包括绝缘基板，功能图案和主虚拟图案。 半导体芯片布置在绝缘基板上。 功能图案形成在绝缘基板上。 功能图案电连接到半导体芯片。 主绝缘基板的绝缘基板的至少一部分在由绝缘基板和半导体芯片的热膨胀系数之差产生的应力路径中至少在功能图案的外侧和/或相邻的部分上形成，因此， 将压力从功能模式转移出去。 因此，应力不集中在功能图案上。 结果，防止了由应力引起的功能性凸起的损坏。