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    Message signaled interrupt extended (MSI-X) auto clear and failsafe lock
    1.
    发明申请
    Message signaled interrupt extended (MSI-X) auto clear and failsafe lock 有权
    消息信号中断扩展（MSI-X）自动清除和故障安全锁定

    公开(公告)号：US20070067534A1

    公开(公告)日：2007-03-22

    申请号：US11228862

    申请日：2005-09-16

    Applicant: Jim Butler ,  Michael Jordan ,  Joe Tien ,  David Duckman

    Inventor： Jim Butler ,  Michael Jordan ,  Joe Tien ,  David Duckman

    IPC: G06F13/24

    CPC classification number: G06F13/24 ,  Y10S707/99953 ,  Y10S707/99955

    Abstract: A method and apparatus is disclosed for improving the MSI and MSI-X specifications by implementing an efficient delivery and clearing mechanism for interrupt conditions to increase performance between the driver and hardware/firmware interface while ensuring that no interrupts are lost in the process. In particular, an auto clear function is employed to eliminate the need for drivers in the host to send writes over the PCI-based bus to deassert and assert attention enable register bits and clear down attention register bits, and a fail safe mechanism is utilized to prevent lost interrupts.

    Abstract translation: 公开了一种用于通过实现用于中断条件的有效递送和清除机制来提高MSI和MSI-X规范以提高驱动器和硬件/固件接口之间的性能同时确保在该过程中不会中断丢失的方法和装置。 特别地，采用自动清除功能来消除对主机中的驱动程序的需求，以通过基于PCI的总线发送写入，以断言并声明注意使能寄存器位并清除注意事件寄存器位，并且使用故障安全机制 防止丢失中断。

    Tracking deferred data transfers on a system-interconnect bus
    6.
    发明授权
    Tracking deferred data transfers on a system-interconnect bus 有权

    公开(公告)号：US07051145B2

    公开(公告)日：2006-05-23

    申请号：US10125101

    申请日：2002-04-17

    Applicant: Jim Butler ,  Khanh Huynh

    Inventor： Jim Butler ,  Khanh Huynh

    IPC: G06F13/00 ,  G06F13/14 ,  G06F11/07

    CPC classification number: G06F13/4226

    Abstract: Systems and techniques to track deferred data transfers on a system-interconnect bus. A deferral response initiates storage of information corresponding to the response and tracking of progress for a requested data transfer. A master device, such as a bus adapter, may include a split-transaction repository, timers, and a split-transaction monitor. The master device may include both hardware and firmware components, and may be designed to handle split responses as defined by a Peripheral Component Interconnect Extended standard.

    Multi-channel memory access arbitration method and system
    7.
    发明申请
    Multi-channel memory access arbitration method and system 有权
    多通道存储器访问仲裁方法和系统

    公开(公告)号：US20050050283A1

    公开(公告)日：2005-03-03

    申请号：US10651890

    申请日：2003-08-29

    Applicant: Eddie Miller ,  David Duckman ,  Jim Butler ,  Khanh Huynh

    Inventor： Eddie Miller ,  David Duckman ,  Jim Butler ,  Khanh Huynh

    IPC: G06F20060101 ,  G06F12/00

    CPC classification number: G06F9/526

    Abstract: A method and system for allowing flexible control of access to a shared memory by multiple requesters. In a preferred embodiment, the invention arbitrates access to flash memory on a HBA between multiple host channels and HBA microprocessors, and eliminates contention possibilities for the flash during write cycles by the allowing a grant to be locked for a period defined by the flash write protocol and timing.

    Abstract translation: 一种用于允许灵活控制多个请求者对共享存储器的访问的方法和系统。 在优选实施例中，本发明仲裁在多个主机信道和HBA微处理器之间的HBA上对闪存的访问，并且通过允许将许可锁定在由闪存写协议定义的时间段内，在写周期期间消除闪存的争用可能性 和时机。

    Phase-locked loop (PLL) circuit for selectively correcting clock skew in different modes
    8.
    发明授权
    Phase-locked loop (PLL) circuit for selectively correcting clock skew in different modes 有权
    锁相环（PLL）电路，用于选择性地校正不同模式下的时钟偏移

    公开(公告)号：US07227921B2

    公开(公告)日：2007-06-05

    申请号：US10379776

    申请日：2003-03-03

    Applicant: Jim Butler ,  Raul Oteyza

    Inventor： Jim Butler ,  Raul Oteyza

    IPC: H03D3/24 ,  H03L7/06

    CPC classification number: G06F1/10 ,  H03L7/06

    Abstract: A phase-locked loop (PLL) circuit includes multiple selectable feedback paths and a mode selector for selecting different feedback paths in different operating modes. The PLL circuit may correct for clock skew or produce a desired degree of clock skew between input and output clock signals in different operating modes.

    Abstract translation: 锁相环（PLL）电路包括多个可选反馈路径和用于在不同操作模式中选择不同反馈路径的模式选择器。 在不同的工作模式下，PLL电路可以校正时钟偏移或在输入和输出时钟信号之间产生期望的时钟偏差程度。

    Method of extending catalyst life in vinyl aromatic hydrocarbon formation
    9.
    发明申请
    Method of extending catalyst life in vinyl aromatic hydrocarbon formation 审中-公开
    在乙烯基芳烃形成中延长催化剂寿命的方法

    公开(公告)号：US20060224029A1

    公开(公告)日：2006-10-05

    申请号：US11092491

    申请日：2005-03-29

    Applicant: Jim Butler

    Inventor： Jim Butler

    IPC: C07C2/64 ,  C07C4/06

    CPC classification number: B01J38/64 ,  B01J8/0457 ,  B01J23/78 ,  B01J23/94 ,  C07C5/3332 ,  C07C2523/04 ,  C07C2523/745 ,  Y02P20/584 ,  C07C15/46

    Abstract: Methods of extending the life of dehydrogenation catalyst are described herein. For example, one embodiment includes providing a catalytic dehydrogenation system, wherein the catalytic dehydrogenation system includes at least one reaction vessel, the at least one reaction vessel loaded with a dehydrogenation catalyst including an alkali metal enhanced iron oxide, contacting the dehydrogenation catalyst with a feedstream including an alkyl aromatic hydrocarbon to form a vinyl aromatic hydrocarbon and contacting the feedstream with a catalyst life extender, wherein the catalyst life extender includes cesium.

    Abstract translation: 本文描述了延长脱氢催化剂寿命的方法。 例如，一个实施方案包括提供催化脱氢系统，其中催化脱氢系统包括至少一个反应容器，所述至少一个反应容器装载有包含碱金属增强的氧化铁的脱氢催化剂，使脱氢催化剂与进料流接触 包括烷基芳族烃以形成乙烯基芳族烃并使进料流与催化剂寿命延长剂接触，其中催化剂生命延长剂包括铯。

    Method for extending catalyst life in processes for preparing vinyl aromatic hydrocarbons
    10.
    发明申请
    Method for extending catalyst life in processes for preparing vinyl aromatic hydrocarbons 审中-公开
    在制备乙烯基芳烃的方法中延长催化剂寿命的方法

    公开(公告)号：US20050222477A1

    公开(公告)日：2005-10-06

    申请号：US11145345

    申请日：2005-06-03

    Applicant: Jim Butler

    Inventor： Jim Butler

    IPC: B01J20060101 ,  B01J2/00 ,  B01J3/08 ,  B01J23/04 ,  B01J23/745 ,  B01J23/78 ,  B01J35/08 ,  C07C2/64 ,  C07C5/333

    CPC classification number: C07C5/3332 ,  B01J23/78 ,  C07C2523/745 ,  C07C15/46

    Abstract: Methods and systems for extending the life of a dehydrogenation catalyst are described herein. For example, one embodiment includes providing an alkyl aromatic hydrocarbon feed stream to a reaction chamber, contacting the feed stream with a dehydrogenation catalyst to form a vinyl aromatic hydrocarbon, the dehydrogenation catalyst including iron oxide and an alkali metal catalysis promoter and supplying a catalyst life extender to at least one reaction chamber, the reaction chamber loaded with the dehydrogenation catalyst, wherein the catalyst life extender includes a potassium salt of a carboxylic acid.

    Abstract translation: 本文描述了用于延长脱氢催化剂寿命的方法和系统。 例如，一个实施方案包括向反应室提供烷基芳族烃进料流，使进料流与脱氢催化剂接触以形成乙烯基芳族烃，脱氢催化剂包括氧化铁和碱金属催化促进剂并提供催化剂寿命 延伸至至少一个反应室，反应室装载有脱氢催化剂，其中催化剂生命延长剂包括羧酸的钾盐。

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