Systems and methods for correction of impact of wafer tilt on misregistration measurements

    公开(公告)号:US12170215B2

    公开(公告)日:2024-12-17

    申请号:US16762107

    申请日:2020-04-05

    Abstract: A method for correcting misregistration measurements of a semiconductor wafer for errors therein arising from tilt of the wafer including measuring, for at least one location on a wafer, a difference between a Tool Induced Shift (TIS) of a metrology device in a first illumination arrangement with respect to the wafer wherein a surface of the wafer is generally orthogonally illuminated by an illumination source of the metrology device and a TIS of the metrology device in a second illumination arrangement with respect to the wafer, wherein the surface is obliquely illuminated by the illumination source, and correcting a misregistration measurement measured by the metrology device at the at least one location for errors therein arising from tilt of the wafer at the location by subtracting from the misregistration measurement a weighted value of the difference between the TIS in the first and second illumination arrangements.

    Self-Moire grating design for use in metrology

    公开(公告)号:US11614692B2

    公开(公告)日:2023-03-28

    申请号:US16758908

    申请日:2020-03-20

    Abstract: A grating for use in metrology including a periodic structure including a plurality of units having a pitch P, at least one unit of the plurality of units including at least a first periodic sub-structure having a first sub-pitch P1 smaller than the pitch P, and at least a second periodic sub-structure arranged along-side and separated from the first periodic sub-structure within the at least one unit and having a second sub-pitch P2 smaller than the pitch P and different from the first sub-pitch P1, P1 and P2 being selected to yield at least one Moir pitch Pm=P1·P2/(P2−P1), the pitch P being an integer multiple of the first sub-pitch P and of the second sub-pitch P2.

    ADAPTIVE MODELING MISREGISTRATION MEASUREMENT SYSTEM AND METHOD

    公开(公告)号:US20220392809A1

    公开(公告)日:2022-12-08

    申请号:US17705077

    申请日:2022-03-25

    Abstract: An adaptive modeling method for generating misregistration data for a semiconductor device wafer (SDW) including calculating a fitting function for a group of SDWs (GSDW) having units, including measuring an SDW in said GSDW, thereby generating test data sets corresponding to the units, removing non-unit-specific values (NUSVs) from the test data sets, thereby generating cleaned test data sets, and analyzing the cleaned test data sets, thereby generating the fitting function, and generating misregistration data for at least one additional SDW (ASDW) in the GSDW, including measuring the ASDW, thereby generating run data sets, removing NUSVs from the run data sets, thereby generating cleaned run data sets, fitting each of the cleaned run data sets to the fitting function, thereby generating coefficient sets, and calculating misregistration data for the ASDW, at least partially based on the fitting function and the coefficient sets.

    IMPROVED SELF-MOIRE GRATING DESIGN FOR USE IN METROLOGY

    公开(公告)号:US20210200106A1

    公开(公告)日:2021-07-01

    申请号:US16758908

    申请日:2020-03-20

    Abstract: A grating for use in metrology including a periodic structure including a plurality of units having a pitch P, at least one unit of the plurality of units including at least a first periodic sub-structure having a first sub-pitch P1 smaller than the pitch P, and at least a second periodic sub-structure arranged along-side and separated from the first periodic sub-structure within the at least one unit and having a second sub-pitch P2 smaller than the pitch P and different from the first sub-pitch P1, P1 and P2 being selected to yield at least one Moir pitch Pm=P1·P2/(P2−P1), the pitch P being an integer multiple of the first sub-pitch P and of the second sub-pitch P2.

    Imaging Overlay Targets Using Moire Elements and Rotational Symmetry Arrangements

    公开(公告)号:US20210072650A1

    公开(公告)日:2021-03-11

    申请号:US16743124

    申请日:2020-01-15

    Abstract: A metrology target may include a first rotationally symmetric working zone with one or more instances of a first pattern and a second rotationally-symmetric working zone with one or more instances of a second pattern, where at least one of the first pattern or the second pattern is a Moiré pattern formed from a first grating structure with a first pitch along a measurement direction on a first sample layer and a second grating structure with a second pitch different than the first pitch along the measurement direction on a second sample layer. Centers of rotational symmetry of the first and second working zones may overlap by design when an overlay error between the first sample layer and the second layer is zero. A difference between the centers of rotational symmetry of the first and second working zones may indicate an overlay error between the first and second sample layers.

    Overlay target design for improved target placement accuracy

    公开(公告)号:US12140859B2

    公开(公告)日:2024-11-12

    申请号:US17769054

    申请日:2022-04-07

    Abstract: A method for semiconductor metrology includes depositing a first film layer on a semiconductor substrate and a second film layer overlying the first film layer. The first and second film layers are patterned to create an overlay target having a specified geometrical form by using a projection system having a predefined resolution limit to project optical radiation onto the semiconductor substrate through at least one mask. The mask contains target features having target feature dimensions no less than the predefined resolution limit in an arrangement corresponding to the specified geometrical form of the overlay target and assist features interleaved with the target features and having at least one assist feature dimension that is less than the predefined resolution limit.

    SYSTEM AND METHOD FOR SUPPRESSION OF TOOL INDUCED SHIFT IN SCANNING OVERLAY METROLOGY

    公开(公告)号:US20240167813A1

    公开(公告)日:2024-05-23

    申请号:US18099798

    申请日:2023-01-20

    CPC classification number: G01B11/272 G01N21/4788 G01N21/956 G01B2210/56

    Abstract: An overlay metrology system and method are disclosed for generating an overlay measurement of an overlay target including cells with structures in reversed orders. The overlay metrology system may include an illumination sub-system and a collection sub-system. The collection sub-system may include one or more detectors to collect measurement light from a sample. The sample, according to a metrology recipe, may include an overlay target having a first cell of a first cell type and a second cell of a second cell type, where the second cell type includes structures in a reverse order relative to the first cell type. The metrology recipe may include receiving detection signals, generating an overlay measurement of each cell based on the detection signals, and generating an overlay measurement associated with the overlay target based on a value indicative of an average of the overlay measurements of each cell.

    On-product overlay targets
    10.
    发明授权

    公开(公告)号:US11967535B2

    公开(公告)日:2024-04-23

    申请号:US17519512

    申请日:2021-11-04

    Abstract: A product includes a semiconductor substrate, with at least first and second thin-film layers disposed on the substrate and patterned to define a matrix of dies, which are separated by scribe lines and contain active areas circumscribed by the scribe lines. A plurality of overlay targets are formed in the first and second thin-film layers within each of the active areas, each overlay target having dimensions no greater than 10 μm×10 μm in a plane parallel to the substrate. The plurality of overlay targets include a first linear grating formed in the first thin-film layer and having a first grating vector, and a second linear grating formed in the second thin-film layer, in proximity to the first linear grating, and having a second grating vector parallel to the first grating vector.

Patent Agency Ranking