公开(公告)号：US20240306395A1

公开(公告)日：2024-09-12

申请号：US18512857

申请日：2023-11-17

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Hyun-Yong YU ,  Dong-Gyu JIN

IPC: H10B51/30 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

CPC classification number: H10B51/30 ,  H01L29/66969 ,  H01L29/78391 ,  H01L29/7869

Abstract: Disclosed are a ferroelectric-based semiconductor device and a method of manufacturing the same. The ferroelectric-based semiconductor device includes a substrate used as a gate; a gate oxide film formed on the substrate; a channel formed on the gate oxide film; and a source/drain formed on the channel, and the semiconductor device is plasma treated. The ferroelectric-based semiconductor device may be used as a memory device and an artificial synaptic device.

公开(公告)号：US20240274713A1

公开(公告)日：2024-08-15

申请号：US18626346

申请日：2024-04-04

Applicant: SK hynix Inc. ,  Korea University Research and Business Foundation

Inventor： Hyun-Yong YU ,  Seung Geun JUNG ,  Mu Yeong SON

IPC: H01L29/78 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/36 ,  H01L29/423

CPC classification number: H01L29/7827 ,  H01L21/823437 ,  H01L29/0847 ,  H01L29/36 ,  H01L29/4236

Abstract: A semiconductor device and a method of manufacturing the same. The semiconductor device has a substrate in which recess regions are formed and semiconductor regions acting as a source region or a drain region is defined between the recess regions; a gate insulating layer disposed on an inner surface of each recess region; a recess gate disposed on the gate insulating layer in each recess region; an insulating capping layer disposed above the recess gate in each recess region; a metallic insertion layer disposed between a side surface of the recess gate and a side surface of the insulating capping layer and facing with a side surface of the source region or the drain region; and an intermediate insulating layer disposed between the metallic insertion layer and the recess gate to electrically insulate the metallic insertion layer from the recess gate.

公开(公告)号：US20220271220A1

公开(公告)日：2022-08-25

申请号：US17624954

申请日：2020-06-30

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Hyun-Yong YU ,  Seung-Hwan KIM

IPC: H01L45/00 ,  H01L27/24

Abstract: The present invention relates to a semiconductor element and a method for manufacturing same, wherein the semiconductor element may comprise: a base element, an intermediate layer formed in at least one direction of the base element; and a metal layer formed on the intermediate layer in a direction opposite to the base element, and wherein a conductive filament may be formed inside the intermediate layer according to the application of a voltage to the intermediate layer.

公开(公告)号：US20250160002A1

公开(公告)日：2025-05-15

申请号：US18947282

申请日：2024-11-14

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Hyun-Yong YU ,  Kyu Hyun HAN

IPC: H01L29/66 ,  H01L21/441 ,  H01L29/786

Abstract: Disclosed are low-plasma treatment-based metal transfer technology, high-quality source-drain formation technology, and a method of manufacturing a semiconductor device using the same. The method of manufacturing the semiconductor device includes preparing an oxide substrate, sequentially depositing a contact metal, Ti, and Au on the oxide substrate, performing plasma treatment on the oxide substrate on which the contact metal, the Ti, and the Au are deposited, attaching an organic film on the oxide substrate on which the contact metal, the Ti, and the Au are deposited, and removing oxide of the oxide substrate.

公开(公告)号：US20180254370A1

公开(公告)日：2018-09-06

申请号：US15913840

申请日：2018-03-06

Applicant: SK hynix Inc. ,  Korea University Research and Business Foundation

Inventor： Hyun-Yong YU ,  Hwan-Jun ZANG

IPC: H01L31/113 ,  H01L31/0352 ,  H01L31/028

CPC classification number: H01L31/113 ,  H01L31/022408 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/1085 ,  H01L31/11

Abstract: A photodiode having a reduced dark current includes a semiconductor layer, a first contact part, a second contact part, and an active region. The first contact part disposed in a first region of the semiconductor layer includes an interlayer and at least one metal layer. The second contact part disposed in a second region of the semiconductor layer includes at least one metal layer. The active region is disposed between the first contact part and the second contact part. The first contact part and the second contact part are arranged asymmetrical to each other.

公开(公告)号：US20250160001A1

公开(公告)日：2025-05-15

申请号：US18947189

申请日：2024-11-14

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Hyun-Yong YU ,  Kyu Hyun HAN

IPC: H01L29/66 ,  H01L21/44

Abstract: Disclosed are low-temperature etching-based metal transfer technology, high-quality source-drain formation technology, and a method of manufacturing a semiconductor device using the same. The method of manufacturing the semiconductor device includes preparing an oxide substrate, sequentially depositing a contact metal, Ti, and Au on the oxide substrate, attaching an organic film on the oxide substrate on which the contact metal, Ti, and Au are deposited, and removing oxide of the oxide substrate.

公开(公告)号：US20240213326A1

公开(公告)日：2024-06-27

申请号：US18371160

申请日：2023-09-21

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Hyun-Yong YU ,  Kyu Hyun HAN

IPC: H01L29/10 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/1054 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78681

Abstract: A two dimensional (2D) semiconductor transistor includes a gate electrode, a gate insulating film provided on the gate electrode, a 2D semiconductor layer provided on the gate insulating film and provided in a hetero-junction structure having a staggered band gap, a source electrode and a drain electrode provided on the 2D semiconductor layer and disposed to be spaced apart from each other. The 2D semiconductor layer includes a first semiconductor layer and a second semiconductor layer having mutually different electrical characteristics and at least partially overlapped with each other, and one of the first semiconductor layer and the second semiconductor layer is lightly doped with dopants.

公开(公告)号：US20220093795A1

公开(公告)日：2022-03-24

申请号：US17480293

申请日：2021-09-21

Applicant: SK hynix Inc. ,  Korea University Research and Business Foundation

Inventor： Hyun-Yong YU ,  Seung Geun JUNG ,  Mu Yeong SON

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/08 ,  H01L29/36 ,  H01L21/8234

Abstract: A semiconductor device and a method of manufacturing the same. The semiconductor device has a substrate in which recess regions are formed and semiconductor regions acting as a source region or a drain region is defined between the recess regions; a gate insulating layer disposed on an inner surface of each recess region; a recess gate disposed on the gate insulating layer in each recess region; an insulating capping layer disposed above the recess gate in each recess region; a metallic insertion layer disposed between a side surface of the recess gate and a side surface of the insulating capping layer and facing with a side surface of the source region or the drain region; and an intermediate insulating layer disposed between the metallic insertion layer and the recess gate to electrically insulate the metallic insertion layer from the recess gate.

公开(公告)号：US20200035830A1

公开(公告)日：2020-01-30

申请号：US16524585

申请日：2019-07-29

Applicant: Korea University Research and Business Foundation

Inventor： Hyun-Yong YU ,  Seung Geun JUNG

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/47 ,  H01L29/66 ,  H01L21/02

Abstract: A semiconductor component is disclosed. The semiconductor component can include: a semiconductor layer injected with a same type of dopant; a gate electrode formed above the semiconductor layer with a gate insulation film positioned in-between; a dielectric layer formed on the semiconductor layer at both sides of the gate electrode; and source/drain electrodes each formed on the dielectric layer.