公开(公告)号：US20240237326A9

公开(公告)日：2024-07-11

申请号：US17973202

申请日：2022-10-25

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHIH-FAN KUAN ,  WEI-CHEN PAN ,  YU-TING LIN ,  HUEI-RU LIN

IPC: H01L27/108 ,  G11C5/06

CPC classification number: H01L27/108 ,  G11C5/063

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

公开(公告)号：US20240121939A1

公开(公告)日：2024-04-11

申请号：US17963462

申请日：2022-10-11

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHIH-FAN KUAN ,  HSU-CHENG FAN ,  JIANN-JONG WANG ,  CHUNG-HSIN LIN ,  YU-TING LIN

IPC: H01L27/108

CPC classification number: H01L27/10805 ,  H01L27/1085 ,  H01L27/10873 ,  H01L27/10885

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.

公开(公告)号：US20240347444A1

公开(公告)日：2024-10-17

申请号：US18135319

申请日：2023-04-17

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： PIN-JHU LI ,  SHIH-FAN KUAN

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76883 ,  H01L28/87 ,  H01L28/91

Abstract: A conductive structure and a capacitor structure and a method of manufacturing a conductive structure are provided. The conductive structure includes a first support layer, a second support layer, a first conductive via, a third support layer and a second conductive via. The second support layer is disposed over the first support layer. The first conductive via is disposed between the first support layer and the second support layer. The third support layer is disposed over the second support layer. The second conductive via is disposed between the second support layer and the third support layer, and electrically connected to the first conductive via. A lateral surface of the first conductive via is discontinuous with a lateral surface of the second conductive via.

公开(公告)号：US20240121940A1

公开(公告)日：2024-04-11

申请号：US18221538

申请日：2023-07-13

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHIH-FAN KUAN ,  HSU-CHENG FAN ,  JIANN-JONG WANG ,  CHUNG-HSIN LIN ,  YU-TING LIN

IPC: H10B12/00

CPC classification number: H10B12/30 ,  H10B12/03 ,  H10B12/05 ,  H10B12/482

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.

公开(公告)号：US20240138139A1

公开(公告)日：2024-04-25

申请号：US18223166

申请日：2023-07-17

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHIH-FAN KUAN ,  WEI-CHEN PAN ,  YU-TING LIN ,  HUEI-RU LIN

IPC: H10B12/00 ,  G11C5/06

CPC classification number: H10B12/00 ,  G11C5/063

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

公开(公告)号：US20240138138A1

公开(公告)日：2024-04-25

申请号：US17973202

申请日：2022-10-24

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHIH-FAN KUAN ,  WEI-CHEN PAN ,  YU-TING LIN ,  HUEI-RU LIN

IPC: H01L27/108 ,  G11C5/06

CPC classification number: H01L27/108 ,  G11C5/063

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

公开(公告)号：US20230402501A1

公开(公告)日：2023-12-14

申请号：US17748869

申请日：2022-05-19

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： YU-MIN CHOU ,  SHIH-FAN KUAN

IPC: H01L49/02

CPC classification number: H01L28/91 ,  H01L28/92

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes: providing a substrate; forming a first nitride layer, a first sacrificial layer, a second nitride layer, a second sacrificial layer and a third nitride layer in sequence over the substrate; forming a first opening and a second opening, wherein the first opening exposes a first landing pad in the substrate, and the second opening exposes a second landing pad in the substrate; forming a first electrode in the first opening and a second electrode in the second opening; removing the first sacrificial layer and the second sacrificial layer concurrently; and forming a conductive layer, conformal to the first electrode, the second electrode, the first nitride layer, the second nitride layer and the third nitride layer.

公开(公告)号：US20240347580A1

公开(公告)日：2024-10-17

申请号：US18135327

申请日：2023-04-17

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： PIN-JHU LI ,  SHIH-FAN KUAN

IPC: H01L21/02 ,  H01L23/522

CPC classification number: H01L28/55 ,  H01L23/5223 ,  H01L28/60 ,  H10B12/03 ,  H10B12/30

Abstract: A capacitor structure and a method of manufacturing a capacitor structure are provided. The capacitor structure includes a conductive via, an intermediate dielectric layer and a top electrode. The conductive via includes a neck portion located near a middle portion thereof. The intermediate dielectric layer is disposed on the conductive via. The top electrode is disposed on the intermediate dielectric layer.

公开(公告)号：US20240237327A9

公开(公告)日：2024-07-11

申请号：US18223166

申请日：2023-07-18

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHIH-FAN KUAN ,  WEI-CHEN PAN ,  YU-TING LIN ,  HUEI-RU LIN

IPC: H10B12/00 ,  G11C5/06

CPC classification number: H10B12/00 ,  G11C5/063

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

公开(公告)号：US20230378248A1

公开(公告)日：2023-11-23

申请号：US17748201

申请日：2022-05-19

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： YU-MIN CHOU ,  SHIH-FAN KUAN

IPC: H01L49/02

CPC classification number: H01L28/91

Abstract: The present disclosure provides a semiconductor structure with a single side capacitor. The semiconductor structure includes a substrate having a first landing pad therein, and a first capacitor disposed over the substrate. The first capacitor includes: a first electrode, disposed over and extending vertically away from the first landing pad; a first dielectric layer, at least partially surrounding the first electrode, wherein the first electrode is shorter than the first dielectric layer; and a second electrode, surrounding the first dielectric layer and the first electrode.