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公开(公告)号:US20240074053A1
公开(公告)日:2024-02-29
申请号:US17895995
申请日:2022-08-25
Applicant: NVIDIA CORPORATION
Inventor: Mingyi YU , Gregory Patrick BODI , Ananta H. ATTALURI , Duy NGUYEN
Abstract: According to various embodiments, a printed circuit board includes: a buried via formed through one or more layers of the printed circuit board; a first conductive pad that is formed on a first end of the buried via; a first conductive via that is formed through a first layer of the printed circuit board and is connected to the first conductive pad; and a second conductive via that is formed through the first layer of the printed circuit board and is connected to the first conductive pad.
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公开(公告)号:US20220279659A1
公开(公告)日:2022-09-01
申请号:US17186868
申请日:2021-02-26
Applicant: NVIDIA CORPORATION
Inventor: Mingyi YU , Gregory Patrick BODI
Abstract: A method for forming a printed circuit board includes: forming on a substrate a first conductive layer for a first edge connector pin and a first conductive layer for a second edge connector pin, wherein the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin are electrically coupled to one another via a first conductive layer for an electrical bridging element; electroplating a second conductive layer onto both the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin via a plating current conductor; and removing at least a portion of the electrical bridging element to electrically separate the first edge connector pin from the second edge connector pin.
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公开(公告)号:US20230276578A1
公开(公告)日:2023-08-31
申请号:US18314054
申请日:2023-05-08
Applicant: NVIDIA CORPORATION
Inventor: Mingyi YU , Gregory Patrick BODI
CPC classification number: H05K3/242 , H05K1/117 , H05K3/0047 , H05K3/043 , H05K2201/0347
Abstract: A method for forming a printed circuit board includes: forming on a substrate a first conductive layer for a first edge connector pin and a first conductive layer for a second edge connector pin, wherein the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin are electrically coupled to one another via a first conductive layer for an electrical bridging element; electroplating a second conductive layer onto both the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin via a plating current conductor; and removing at least a portion of the electrical bridging element to electrically separate the first edge connector pin from the second edge connector pin.
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公开(公告)号:US20210127479A1
公开(公告)日:2021-04-29
申请号:US17081916
申请日:2020-10-27
Applicant: NVIDIA CORPORATION
Inventor: Mingyi YU , Ananta H. ATTALURI , Gregory Patrick BODI , Carmen A. CAPILLO, JR. , Michael James WARNER
Abstract: A printed circuit board includes a first voltage plane disposed on a first surface of a first electrically insulating layer and a second voltage plane. An inter-layer slot that is formed through the first electrically insulating layer and includes an electrically conductive material electrically couples the first voltage plane to the second voltage plane.
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