公开(公告)号：US20220262447A1

公开(公告)日：2022-08-18

申请号：US17670226

申请日：2022-02-11

Applicant: NVIDIA Corp.

Inventor： Sunil Sudhakaran ,  Gautam Bhatia ,  Robert Bloemer

IPC: G11C29/02 ,  G11C29/42 ,  G11C29/44 ,  G11C29/12 ,  H03K19/00

Abstract: First symbols are generated on a plurality of data channels by applying PAM-N encoding on a first subset of bits of a data burst, the first symbols generated without maximum transitions; second symbols are generated on at least one optionally-activated additional data channel, the second symbols generated by applying the PAM-N encoding on a second subset of bits of the data burst, the second symbols generated without maximum transitions; and third symbols are generated on a channel for communicating error correction bits for the first bits and second bits, the third symbols generated by applying hybrid PAM-N encoding on the error correction bits and a third subset of bits of the data burst, the hybrid PAM-N encoding comprising an interleaving of symbols with N voltage levels and symbols with less than N voltage levels.

公开(公告)号：US20230418705A1

公开(公告)日：2023-12-28

申请号：US18459215

申请日：2023-08-31

Applicant: NVIDIA Corp.

Inventor： Gautam Bhatia ,  Sunil Sudhakaran ,  Kyutaeg Oh

IPC: G06F11/10 ,  G06F11/07

CPC classification number: G06F11/1004 ,  G06F11/0787 ,  G06F11/1068

Abstract: A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits includes data channels, auxiliary data channels, and at least one error correction channel. The transceiver includes an encoder that applies 11b7s encoding to a first number of the data bits to generate first PAM-3 symbols on some or all of the communication channels, and that applies 3b2s encoding to a second number of the data bits to generate second PAM-3 symbols on at least some of the communication channels.

公开(公告)号：US12197281B2

公开(公告)日：2025-01-14

申请号：US18459215

申请日：2023-08-31

Applicant: NVIDIA Corp.

Inventor： Gautam Bhatia ,  Sunil Sudhakaran ,  Kyutaeg Oh

IPC: G06F11/10 ,  G06F11/07

Abstract: A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits includes data channels, auxiliary data channels, and at least one error correction channel. The transceiver includes an encoder that applies 11b7s encoding to a first number of the data bits to generate first PAM-3 symbols on some or all of the communication channels, and that applies 3b2s encoding to a second number of the data bits to generate second PAM-3 symbols on at least some of the communication channels.

公开(公告)号：US20230297466A1

公开(公告)日：2023-09-21

申请号：US18186464

申请日：2023-03-20

Applicant: NVIDIA Corp.

Inventor： Gautam Bhatia ,  Sunil Sudhakaran ,  Kyutaeg Oh

IPC: G06F11/10 ,  G06F11/07

CPC classification number: G06F11/1004 ,  G06F11/1068 ,  G06F11/0787

Abstract: Data bits are encoded in an eleven bit seven pulse amplitude modulated three-level (PAM-3) symbol format on a plurality of data channels and two auxiliary data channels, and one or more of a cyclic redundancy check (CRC) value, a poison value, and a severity value are encoded as PAM-3 symbols on an error correction channel.

公开(公告)号：US12135607B2

公开(公告)日：2024-11-05

申请号：US18186464

申请日：2023-03-20

Applicant: NVIDIA Corp.

Inventor： Gautam Bhatia ,  Sunil Sudhakaran ,  Kyutaeg Oh

IPC: G06F11/10 ,  G06F11/07

Abstract: Data bits are encoded in one or both of an eleven bit seven pulse amplitude modulated three-level (PAM-3) symbol (11b7s) format and a three bit two symbol (3b2s) format on a plurality of data channels and on an error correction channel. One or more of a cyclic redundancy check (CRC) value, a poison value, and a severity value are encoded as 11b7s and/or 3b2s PAM-3 symbols on the error correction channel.