公开(公告)号：US20140133861A1

公开(公告)日：2014-05-15

申请号：US13648140

申请日：2012-10-09

Applicant: Oracle International Corporation

Inventor： Arslan Zulfiqar ,  Pranay Koka ,  Herbert D. Schwetman, JR.

IPC: H04J14/02

CPC classification number: H04J14/0257 ,  H04J14/0256 ,  H04J14/0273 ,  H04J14/0275 ,  H04J14/0278 ,  H04J14/0284

Abstract: In a multi-chip module (MCM), integrated circuits are coupled by optical waveguides that convey optical signals. The optical waveguides provide dedicated point-to-point optical links between all pairs of the integrated circuits. Moreover, for a given point-to-point optical link between a given pair of integrated circuits, other integrated circuits in the integrated circuits steal access on the given point-to-point optical link when communicating information to one of the given pair of integrated circuits so that the given point-to-point optical link is shared by more than the given pair of integrated circuits. Furthermore, the integrated circuits recover errors in messages in the optical signals corrupted by collisions on the given point-to-point optical link using erasure coding. In this way, the MCM may provide an optical network with increased bandwidth relative to a point-to-point optical network.

Abstract translation: 在多芯片模块（MCM）中，集成电路通过传送光信号的光波导耦合。 光波导在所有集成电路对之间提供专用的点对点光学链路。 此外，对于给定的一对集成电路之间的给定的点对点光链路，集成电路中的其他集成电路在将信息传送到给定的一对集成电路之一时，在给定的点对点光链路上窃取访问 使得给定的点对点光链路被多于给定的集成电路对共享。 此外，集成电路使用擦除编码来恢复在给定的点对点光链路上的冲突损坏的光信号中的消息中的错误。 以这种方式，MCM可以提供相对于点对点光网络具有增加的带宽的光网络。

公开(公告)号：US20140269751A1

公开(公告)日：2014-09-18

申请号：US13840085

申请日：2013-03-15

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Pranay Koka ,  Herbert D. Schwetman, JR. ,  Syed Ali Raza Jafri

IPC: H04L12/863

CPC classification number: H04L47/6205 ,  H04L47/6225 ,  H04L49/254 ,  H04L49/356

Abstract: An arbitration technique for determining mappings for a switch is described. During a given arbitration decision cycle, an arbitration mechanism maintains, until expiration, a set of mappings from a subset of the input ports to a subset of the output ports of the switch. This set of mappings was determined during an arbitration decision cycle up to K cycles preceding the given arbitration decision cycle. Because the set of mappings are maintained, it is easier for the arbitration mechanism to determine mappings from a remainder of the input ports to the remainder of the output ports without collisions.

Abstract translation: 描述了用于确定交换机的映射的仲裁技术。 在给定的仲裁决定周期期间，仲裁机制维持从输入端口的子集到交换机的输出端口的子集的映射集，直到到期为止。 在一个仲裁决定周期内，确定了一组映射，直到给定仲裁决定周期之前的K个周期。 因为维护了一组映射，所以仲裁机制更容易确定从输入端口的其余部分到没有冲突的其余输出端口的映射。

公开(公告)号：US20130308944A1

公开(公告)日：2013-11-21

申请号：US13666521

申请日：2012-11-01

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Herbert D. Schwetman, JR. ,  Michael O. McCracken ,  Pranay Koka

IPC: H04J14/00 ,  H04J14/02

CPC classification number: G02B6/12007 ,  G02B6/3544 ,  G02B6/43 ,  G02B2006/12085 ,  G02B2006/12145 ,  G02B2006/12164 ,  H04J14/0212 ,  H04Q11/0005 ,  H04Q2011/0052

Abstract: In a multi-chip module (MCM), optical waveguides in a first plane convey modulated optical signals among integrated circuits (which are sometimes referred to as ‘chips’). Moreover, an optical-butterfly switch, optically coupled to the optical waveguides, dynamically allocates communication bandwidth among the integrated circuits. This optical-butterfly switch includes optical components in the first plane and a second plane, and optical couplers that couple the modulated optical signals to and from the first plane and the second plane. In this way, the MCM communicates the modulated optical signals among the integrated circuits without optical-waveguide crossings in a given plane.

Abstract translation: 在多芯片模块（MCM）中，第一平面中的光波导在集成电路之间传送调制的光信号（有时称为“芯片”）。 此外，光耦合到光波导的光蝶形开关动态地分配集成电路之间的通信带宽。 该光蝶形开关包括第一平面中的光学部件和第二平面，以及将调制光信号耦合到第一平面和第二平面的光耦合器。 以这种方式，MCM在集成电路中通信调制的光信号，而在给定的平面内没有光波导交叉。

公开(公告)号：US20160062894A1

公开(公告)日：2016-03-03

申请号：US14472105

申请日：2014-08-28

Applicant: Oracle International Corporation

Inventor： Herbert D. Schwetman, JR. ,  Mohammad Arslan Zulfiqar ,  Pranay Koka

IPC: G06F12/08

CPC classification number: G06F12/0862 ,  G06F12/0813 ,  G06F12/0842 ,  G06F12/1027 ,  G06F13/1657 ,  G06F13/1663 ,  G06F2212/1024 ,  G06F2212/602 ,  G06F2212/603 ,  H04L67/2847 ,  H04L69/22

Abstract: Each computing node of a distributed computing system may implement a hardware mechanism at the network interface for message driven prefetching of application data. For example, a parallel data-intensive application that employs function shipping may distribute respective portions of a large data set to main memory on multiple computing nodes. The application may send messages to one of the computing nodes referencing data that is stored locally on the node. For each received message, the network interface on the recipient node may extract the reference, initiate the prefetching of referenced data into a local cache (e.g., an LLC), and then store the message for subsequent interpretation and processing by a local processor core. When the processor core retrieves a stored message for processing, the referenced data may already be in the LLC, avoiding a CPU stall while retrieving it from memory. The hardware mechanism may be configured via software.

Abstract translation: 分布式计算系统的每个计算节点可以在网络接口处实现用于消息驱动预取应用数据的硬件机制。 例如，采用功能运输的并行数据密集型应用程序可以将大数据集的各个部分分配到多个计算节点上的主存储器。 应用程序可以向参考在本地节点上存储的数据的计算节点之一发送消息。 对于每个接收到的消息，接收方节点上的网络接口可以提取参考，发起将参考数据预取到本地高速缓存（例如，LLC）中，然后存储该消息用于本地处理器核心的后续解释和处理。 当处理器核心检索存储的消息进行处理时，引用的数据可能已经在LLC中，从而在从存储器检索时停止CPU停止。 可以通过软件配置硬件机制。

公开(公告)号：US20140119738A1

公开(公告)日：2014-05-01

申请号：US13666548

申请日：2012-11-01

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Xuezhe Zheng ,  Pranay Koka ,  Herbert D. Schwetman, JR. ,  Ronald Ho ,  Ashok V. Krishnamoorthy

IPC: H04B10/02

CPC classification number: H04B10/801

Abstract: In a multi-chip module (MCM), first and second optical waveguides convey optical signals among integrated circuits. The first and second optical waveguides may be implemented in a first layer or plane on a substrate. Moreover, bridge chips in a second plane may be used to couple the optical signals between the first or second optical waveguides and the integrated circuits. By using a single layer for optical routing, the MCM may provide a point-to-point network among the integrated circuits without optical-waveguide crossing.

Abstract translation: 在多芯片模块（MCM）中，第一和第二光波导在集成电路之间传送光信号。 第一和第二光波导可以在衬底上的第一层或平面中实现。 此外，第二平面中的桥芯片可用于耦合第一或第二光波导与集成电路之间的光信号。 通过使用单层光路由，MCM可以在集成电路之间提供无光波导交叉的点对点网络。

公开(公告)号：US20140089572A1

公开(公告)日：2014-03-27

申请号：US13625502

申请日：2012-09-24

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Pranay Koka ,  David A. Munday ,  Michael O. McCracken ,  Herbert D. Schwetman, JR.

IPC: G06F12/08

CPC classification number: G06F12/1009 ,  G06F12/1072 ,  G06F2212/682

Abstract: The disclosed embodiments provide a system that performs distributed page-table lookups in a shared-memory multiprocessor system with two or more nodes, where each of these nodes includes a directory controller that manages a distinct portion of the system's address space. During operation, a first node receives a request for a page-table entry that is located at a physical address that is managed by the first node. The first node accesses its directory controller to retrieve the page-table entry, and then uses the page-table entry to calculate the physical address for a subsequent page-table entry. The first node determines the home node (e.g., the managing node) for this calculated physical address, and sends a request for the subsequent page-table entry to that home node.

Abstract translation: 所公开的实施例提供了一种在具有两个或更多个节点的共享存储器多处理器系统中执行分布式页表查找的系统，其中这些节点中的每一个包括管理系统地址空间的不同部分的目录控制器。 在操作期间，第一节点接收对位于由第一节点管理的物理地址的页表条目的请求。 第一个节点访问其目录控制器以检索页表条目，然后使用页表条目计算后续页表条目的物理地址。 第一节点确定该计算出的物理地址的归属节点（例如，管理节点），并且向该家庭节点发送对后续页表条目的请求。

公开(公告)号：US20150071632A1

公开(公告)日：2015-03-12

申请号：US14021555

申请日：2013-09-09

Applicant: Oracle International Corporation

Inventor： Pranay Koka ,  Herbert D. Schwetman, JR.

IPC: H04Q11/00

CPC classification number: H04Q11/00 ,  H04Q2213/1302 ,  H04Q2213/1304 ,  H04Q2213/13109

Abstract: A network is described in which a base optical point-to-point (P2P) network can be reconfigured to a target network topology. This reconfigurable architecture customizes the network topology for different classes of applications to maximize throughput. In particular, the network can function efficiently at high-radix and low-radix traffic patterns. This capability is obtained using configurable electrical circuit switches at each node in the network. These configurable electrical circuit switches can be set so that incoming packets are directly routed to a specified output (either a local destination or an outgoing optical link) without: delay, contention, or buffers. In this way, predefined network topologies can be configured with improved node-to-node bandwidths when compared to the original P2P network by leveraging unused optical links. Furthermore, because the electrical circuit switches can be reconfigured, the network topology can be dynamically reconfigured to suit applications or application phases.

Abstract translation: 描述了一种网络，其中可以将基本光点对点（P2P）网络重新配置为目标网络拓扑。 这种可重构架构为不同类别的应用定制网络拓扑，以最大限度地提高吞吐量。 特别地，网络可以以高基数和低基数业务模式有效地运行。 该功能通过网络中每个节点上的可配置电路交换机获得。 这些可配置的电路开关可以被设置为使得输入分组直接路由到指定的输出（本地目的地或输出光链路），而不会：延迟，争用或缓冲。 以这种方式，通过利用未使用的光链路，与原始P2P网络相比，可以配置具有改进的节点到节点带宽的预定义网络拓扑。 此外，由于可以重新配置电路交换机，因此可以动态地重新配置网络拓扑，以适应应用或应用阶段。

公开(公告)号：US20140122802A1

公开(公告)日：2014-05-01

申请号：US13665826

申请日：2012-10-31

Applicant: Oracle International Corporation

Inventor： Pranay Koka ,  Michael O. McCracken ,  Herbert D. Schwetman, JR. ,  Ronald Ho

IPC: G06F12/08

CPC classification number: G06F12/0848 ,  G06F12/0893

Abstract: The disclosed embodiments provide a system in which a processor chip accesses an off-chip cache via silicon photonic waveguides. The system includes a processor chip and a cache chip that are both coupled to a communications substrate. The cache chip comprises one or more cache banks that receive cache requests from a structure in the processor chip optically via a silicon photonic waveguide. More specifically, the silicon photonic waveguide is comprised of waveguides in the processor chip, the communications substrate, and the cache chip, and forms an optical channel that routes an optical signal directly from the structure to a cache bank in the cache chip via the communications substrate. Transmitting optical signals from the processor chip directly to cache banks on the cache chip facilitates reducing the wire latency of cache accesses and allowing each cache bank on the cache chip to be accessed with uniform latency.

Abstract translation: 所公开的实施例提供了一种系统，其中处理器芯片通过硅光子波导访问片外高速缓存。 该系统包括耦合到通信基板的处理器芯片和高速缓存芯片。 高速缓存芯片包括一个或多个高速缓存组，其经由硅光子波导光学地从处理器芯片中的结构接收高速缓存请求。 更具体地，硅光子波导由处理器芯片，通信基板和高速缓存芯片中的波导构成，并且形成光信道，其通过通信将光信号从结构直接路由到高速缓存芯片中的高速缓存组 基质。 将来自处理器芯片的光信号直接发送到高速缓存芯片上的高速缓存存储体，有助于减少高速缓存访​​问的线延迟，并允许以均匀延迟访问缓存芯片上的每个高速缓存组。