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    Accessing an off-chip cache via silicon photonic waveguides
    1.
    发明授权
    Accessing an off-chip cache via silicon photonic waveguides 有权
    通过硅光子波导访问片外高速缓存

    公开(公告)号：US09390016B2

    公开(公告)日：2016-07-12

    申请号：US13665826

    申请日：2012-10-31

    Applicant: Oracle International Corporation

    Inventor： Pranay Koka ,  Michael O. McCracken ,  Herbert D. Schwetman, Jr. ,  Ronald Ho

    IPC: G06F12/00 ,  G06F12/08

    CPC classification number: G06F12/0848 ,  G06F12/0893

    Abstract: The disclosed embodiments provide a system in which a processor chip accesses an off-chip cache via silicon photonic waveguides. The system includes a processor chip and a cache chip that are both coupled to a communications substrate. The cache chip comprises one or more cache banks that receive cache requests from a structure in the processor chip optically via a silicon photonic waveguide. More specifically, the silicon photonic waveguide is comprised of waveguides in the processor chip, the communications substrate, and the cache chip, and forms an optical channel that routes an optical signal directly from the structure to a cache bank in the cache chip via the communications substrate. Transmitting optical signals from the processor chip directly to cache banks on the cache chip facilitates reducing the wire latency of cache accesses and allowing each cache bank on the cache chip to be accessed with uniform latency.

    Abstract translation: 所公开的实施例提供了一种系统，其中处理器芯片通过硅光子波导访问片外高速缓存。 该系统包括耦合到通信基板的处理器芯片和高速缓存芯片。 高速缓存芯片包括一个或多个高速缓存组，其经由硅光子波导光学地从处理器芯片中的结构接收高速缓存请求。 更具体地，硅光子波导由处理器芯片，通信基板和高速缓存芯片中的波导构成，并且形成光信道，其通过通信将光信号直接从结构路由到高速缓存芯片中的高速缓存组 基质。 将来自处理器芯片的光信号直接发送到高速缓存芯片上的高速缓存存储体，有助于减少高速缓存访​​问的线延迟，并允许以均匀延迟访问缓存芯片上的每个高速缓存组。

    ACCESSING AN OFF-CHIP CACHE VIA SILICON PHOTONIC WAVEGUIDES
    2.
    发明申请
    ACCESSING AN OFF-CHIP CACHE VIA SILICON PHOTONIC WAVEGUIDES 有权
    通过硅光子波形访问片外高速缓存

    公开(公告)号：US20140122802A1

    公开(公告)日：2014-05-01

    申请号：US13665826

    申请日：2012-10-31

    Applicant: Oracle International Corporation

    Inventor： Pranay Koka ,  Michael O. McCracken ,  Herbert D. Schwetman, JR. ,  Ronald Ho

    IPC: G06F12/08

    CPC classification number: G06F12/0848 ,  G06F12/0893

    Abstract: The disclosed embodiments provide a system in which a processor chip accesses an off-chip cache via silicon photonic waveguides. The system includes a processor chip and a cache chip that are both coupled to a communications substrate. The cache chip comprises one or more cache banks that receive cache requests from a structure in the processor chip optically via a silicon photonic waveguide. More specifically, the silicon photonic waveguide is comprised of waveguides in the processor chip, the communications substrate, and the cache chip, and forms an optical channel that routes an optical signal directly from the structure to a cache bank in the cache chip via the communications substrate. Transmitting optical signals from the processor chip directly to cache banks on the cache chip facilitates reducing the wire latency of cache accesses and allowing each cache bank on the cache chip to be accessed with uniform latency.

    Abstract translation: 所公开的实施例提供了一种系统，其中处理器芯片通过硅光子波导访问片外高速缓存。 该系统包括耦合到通信基板的处理器芯片和高速缓存芯片。 高速缓存芯片包括一个或多个高速缓存组，其经由硅光子波导光学地从处理器芯片中的结构接收高速缓存请求。 更具体地，硅光子波导由处理器芯片，通信基板和高速缓存芯片中的波导构成，并且形成光信道，其通过通信将光信号从结构直接路由到高速缓存芯片中的高速缓存组 基质。 将来自处理器芯片的光信号直接发送到高速缓存芯片上的高速缓存存储体，有助于减少高速缓存访​​问的线延迟，并允许以均匀延迟访问缓存芯片上的每个高速缓存组。

    SINGLE-LAYER OPTICAL POINT-TO-POINT NETWORK
    4.
    发明申请
    SINGLE-LAYER OPTICAL POINT-TO-POINT NETWORK 审中-公开
    单层光点点对点网络

    公开(公告)号：US20140119738A1

    公开(公告)日：2014-05-01

    申请号：US13666548

    申请日：2012-11-01

    Applicant: ORACLE INTERNATIONAL CORPORATION

    Inventor： Xuezhe Zheng ,  Pranay Koka ,  Herbert D. Schwetman, JR. ,  Ronald Ho ,  Ashok V. Krishnamoorthy

    IPC: H04B10/02

    CPC classification number: H04B10/801

    Abstract: In a multi-chip module (MCM), first and second optical waveguides convey optical signals among integrated circuits. The first and second optical waveguides may be implemented in a first layer or plane on a substrate. Moreover, bridge chips in a second plane may be used to couple the optical signals between the first or second optical waveguides and the integrated circuits. By using a single layer for optical routing, the MCM may provide a point-to-point network among the integrated circuits without optical-waveguide crossing.

    Abstract translation: 在多芯片模块（MCM）中，第一和第二光波导在集成电路之间传送光信号。 第一和第二光波导可以在衬底上的第一层或平面中实现。 此外，第二平面中的桥芯片可用于耦合第一或第二光波导与集成电路之间的光信号。 通过使用单层光路由，MCM可以在集成电路之间提供无光波导交叉的点对点网络。

    Wavelength-locking a ring-resonator modulator
    10.
    发明授权
    Wavelength-locking a ring-resonator modulator 有权

    公开(公告)号：US09983420B2

    公开(公告)日：2018-05-29

    申请号：US14516301

    申请日：2014-10-16

    Applicant: Oracle International Corporation

    Inventor： Philip Amberg ,  Eric Y. Chang ,  Xuezhe Zheng ,  Frankie Y. Liu ,  Ronald Ho ,  Ashok V. Krishnamoorthy

    IPC: G02F1/025 ,  G02F1/01

    CPC classification number: G02F1/025 ,  G02F1/0147 ,  G02F2201/58 ,  G02F2203/15

    Abstract: In the optical device, a ring-resonator modulator, having an adjustable resonance (center) wavelength, optically couples an optical signal that includes the carrier wavelength from an input optical waveguide to an output optical waveguide. A monitoring mechanism in the optical device, which is optically coupled to the output optical waveguide, monitors a performance metric of an output optical signal from the output waveguide. For example, the monitoring mechanism may monitor: an average optical power associated with the output optical signal, and/or an amplitude of the output optical signal. Moreover, control logic in the optical device adjusts the resonance wavelength based on the monitored performance metric so that the performance metric is optimized.

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