DARK-CURRENT INHIBITING IMAGE SENSOR AND METHOD

    公开(公告)号:US20230154960A1

    公开(公告)日:2023-05-18

    申请号:US17530296

    申请日:2021-11-18

    Abstract: A dark-current-inhibiting image sensor includes a semiconductor substrate, a thin and a thin junction. The semiconductor substrate includes a front surface, a back surface opposite the front surface, a photodiode, and a concave surface between the front surface and the back surface. The concave surface extends from the back surface toward the front surface, and defines a trench that surrounds the photodiode in a cross-sectional plane parallel to the back surface. The thin junction extends from the concave surface into the semiconductor substrate, and is a region of the semiconductor substrate. The semiconductor substrate includes a first substrate region, located between the thin junction and the photodiode, that has a first conductive type. The photodiode and the thin junction have a second conductive type opposite the first conductive type.

    IMAGE SENSOR WITH VERTICAL TRANSFER GATE

    公开(公告)号:US20230067685A1

    公开(公告)日:2023-03-02

    申请号:US17411828

    申请日:2021-08-25

    Inventor: Hui ZANG Gang CHEN

    Abstract: A pixel of an image sensor includes a semiconductor substrate having a front surface and a back surface opposing the front surface, a photodiode and floating diffusion (FD) region formed in the substrate along a first pixel axis parallel to the front surface and a transfer gate formed in the front surface of the substrate between the photodiode and the FD region. The transfer gate includes a planar gate on the front surface of the substrate, a vertical transfer gate extending into the substrate from the planar gate, the vertical transfer gate further including a trench and a layer of doped semiconductor material epitaxially grown on the sides and bottom of the trench. The semiconductor substrate and the epitaxial layer comprise a first conductive type, and the photodiode and the FD region comprise a second conductive type. An image sensor and method of forming the vertical transfer gate are disclosed.

    PIXEL FORMATION METHOD
    3.
    发明申请

    公开(公告)号:US20220115431A1

    公开(公告)日:2022-04-14

    申请号:US17556141

    申请日:2021-12-20

    Inventor: Hui ZANG Gang CHEN

    Abstract: A method for forming a pixel includes forming, in a semiconductor substrate, a wide trench having an upper depth with respect to a planar top surface of the semiconductor substrate. The method also includes ion-implanting a floating-diffusion region between the planar top surface and a junction depth in the semiconductor substrate. In a cross-sectional plane perpendicular to the planar top surface, the floating-diffusion region has (i) an upper width between the planar top surface and the upper depth, and (ii) between the upper depth and the junction depth, a lower width that exceeds the upper width. Part of the floating-diffusion region is beneath the wide trench and between the upper depth and the junction depth.

    PIXEL, ASSOCIATED IMAGE SENSOR, AND METHOD

    公开(公告)号:US20210183937A1

    公开(公告)日:2021-06-17

    申请号:US16711239

    申请日:2019-12-11

    Inventor: Hui ZANG Gang CHEN

    Abstract: A pixel includes a semiconductor substrate, an upper surface thereof forming a trench having a trench depth relative to a planar region of the upper surface surrounding the trench, and in a plane perpendicular to the planar region; an upper width between the planar region and an upper depth that is less than the trench depth; and a lower width, between the upper depth and the trench depth, that is less than the upper width. A floating diffusion region adjacent to the trench extends away from the planar region to a junction depth exceeding the upper depth and is less than the trench depth. The photodiode region in the substrate includes a lower photodiode section beneath the trench and an upper photodiode section adjacent to the trench, beginning at a photodiode depth that is less than the trench depth, extending toward and adjoining the lower photodiode section.

    GLOBAL-SHUTTER PIXEL
    5.
    发明公开

    公开(公告)号:US20240145497A1

    公开(公告)日:2024-05-02

    申请号:US17977837

    申请日:2022-10-31

    Abstract: A global-shutter pixel includes a semiconductor substrate that has a storage node and a photodiode region. A front surface of the substrate has a first recessed region between the photodiode region and the storage node in a first direction parallel to the front surface, and a second recessed region between the first recessed region and the storage node in the first direction. The first and second recessed regions extend into the substrate to a respective first recess-depth and a second recess-depth that exceeds the first recess-depth. The photodiode region includes (i) a first doped-section spanning a depth-range and having a first dopant concentration, and (ii) a second doped-section between the front surface and the first doped-section and having a second dopant concentration that is less than the first dopant concentration. The first doped-section includes a protrusion that extends at least partially beneath the first recessed region in the first direction.

    HIGH DYNAMIC RANGE, BACKSIDE-ILLUMINATED, LOW CROSSTALK IMAGE SENSOR WITH WALLS ON BACKSIDE SURFACE TO ISOLATE PHOTODIODES

    公开(公告)号:US20230282671A1

    公开(公告)日:2023-09-07

    申请号:US17592370

    申请日:2022-02-03

    Inventor: Hui ZANG Gang CHEN

    Abstract: A backside-illuminated image sensor includes photodiodes in photodiode regions electrically isolated by filled trenches with openings in a dielectric layer over the photodiodes. The image sensor has a metal grid aligned over the trenches, the metal grid within 80 nanometers of the trenches. The image sensor is formed by: fabricating photodiodes in photodiode regions of a frontside of a silicon substrate with source-drain regions of transistors, the photodiodes electrically isolated by deep trenches, each photodiode within a photodiode region of the substrate; forming the filled trenches in a backside of the semiconductor substrate; forming protective oxide and process stop layers over the backside of the semiconductor substrate; depositing a metal grid over the deep trenches, removing the process stop layer from over photodiode regions; and depositing color filters over the photodiode regions.

    FABRICATION PROCESS OF VERTICAL-CHANNEL, SILICON, FIELD-EFFECT TRANSISTORS

    公开(公告)号:US20220199665A1

    公开(公告)日:2022-06-23

    申请号:US17126584

    申请日:2020-12-18

    Abstract: A method of fabricating transistors with a vertical gate in trenches includes lithographing to form wide trenches; forming dielectric in the trenches and filling the trenches with flowable material; and lithography to form narrow trenches within the wide trenches thereby exposing well or substrate before epitaxially growing semiconductor strips atop substrate exposed by the narrow trenches; removing the flowable material; growing gate oxide on the semiconductor strip; forming gate conductor over the gate oxide and into gaps between the epitaxially-grown semiconductor strips and the dielectric; masking and etching the gate conductor; and implanting source and drain regions. The transistors formed have semiconductor strips extending from a source region to a drain region, the semiconductor strips within trenches, the trench walls insulated with a dielectric, a gate oxide formed on both vertical walls of the semiconductor strip; and gate material between the dielectric and gate oxide.

    FLICKER-MITIGATING PIXEL-ARRAY SUBSTRATE

    公开(公告)号:US20220190019A1

    公开(公告)日:2022-06-16

    申请号:US17118252

    申请日:2020-12-10

    Abstract: A flicker-mitigating pixel-array substrate includes a semiconductor substrate and a metal annulus. The semiconductor substrate includes a small-photodiode region. A back surface of the semiconductor substrate forms a trench surrounding the small-photodiode region in a cross-sectional plane parallel to a back-surface region of the back surface above the small-photodiode region. The metal annulus (i) at least partially fills the trench, (ii) surrounds the small-photodiode region in the cross-sectional plane, and (iii) extends above the back surface. A method for fabricating a flicker-mitigating pixel-array substrate includes forming a metal layer (i) in a trench that surrounds the small-photodiode region in a cross-sectional plane parallel to a back-surface region of the back surface above the small-photodiode region and (ii) on the back-surface region. The method also includes decreasing a thickness of an above-diode section of the metal layer located above the back-surface region.

    POINTED-TRENCH PIXEL-ARRAY SUBSTRATE AND ASSOCIATED FABRICATION METHOD

    公开(公告)号:US20220130886A1

    公开(公告)日:2022-04-28

    申请号:US17080797

    申请日:2020-10-26

    Inventor: Hui ZANG Gang CHEN

    Abstract: A pointed-trench pixel-array substrate includes a floating diffusion region and a photodiode region formed in a semiconductor substrate. The semiconductor substrate includes, between a top surface and a back surface thereof, a sidewall surface and a bottom surface defining a trench extending into the semiconductor substrate away from a planar region of the top surface surrounding the trench. In a cross-sectional plane perpendicular to the top surface and intersecting the floating diffusion region, the photodiode region, and the trench, (i) the bottom surface is V-shaped and (ii) the trench is located between the floating diffusion region and the photodiode region

    METHOD AND IMAGE SENSOR WITH VERTICAL TRANSFER GATE AND BURIED BACKSIDE-ILLUMINATED PHOTODIODES

    公开(公告)号:US20220059587A1

    公开(公告)日:2022-02-24

    申请号:US16996804

    申请日:2020-08-18

    Inventor: Hui ZANG Gang CHEN

    Abstract: A photodiode array has buried photodiodes and vertical selection transistors. Trenches are lined with gate oxide and metallic plugs of first material lie within the trenches. Gate contacts of second material contact the metallic plugs, with photodiode diffusion regions adjacent the trenches as sources of vertical transistors, the metallic plugs form gates of the vertical transistors, and buried photodiode regions form sources of the vertical transistors. In embodiments, the first conductive material is tungsten, titanium nitride, titanium carbide, or aluminum and the second conductive material is polysilicon. The array is formed by trenching, growing gate oxide, and depositing first material in the trenches. The first material is etched to define metallic plugs, the second material is deposited onto the metallic plugs then masked and etched; and drain regions implanted. Etching the second material is performed by a reactive ion etch that stops upon reaching the metallic plugs.

Patent Agency Ranking