Abstract:
An integrated circuit device that comprises a single semiconductor substrate, a device layer formed on a frontside of the single semiconductor substrate, a redistribution layer formed on a backside of the single semiconductor substrate, a through silicon via (TSV) formed within the single semiconductor substrate that is electrically coupled to the device layer and to the redistribution layer, a logic-memory interface (LMI) formed on a backside of the single semiconductor substrate that is electrically coupled to the redistribution layer, and a MEMS device formed on the backside of the single semiconductor substrate that is electrically coupled to the redistribution layer.
Abstract:
Various embodiments are generally directed to an apparatus and method for determining when an eye is focused on a display scene and determining movement of the eye based on image information when the eye is focused on the display scene. Various embodiments may also include detecting motion of an apparatus based on motion information and adjusting at least one of a position and a size of a frame in the display scene based on at least one of the movement of the eye and the motion of the apparatus.
Abstract:
Methods of forming integrated MEMS structures are described. Those methods and structures may include forming at least one MEMS structure on a first substrate, forming a first bonding layer on a top surface of the first substrate, and then coupling the first bonding layer disposed on the first substrate to a second substrate, wherein the second substrate comprises a device layer. The bonding may comprise a layer transfer process, wherein an integrated MEMS device is formed.
Abstract:
Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.
Abstract:
Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.
Abstract:
A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
Abstract:
Briefly, in accordance with one or more embodiments, a method to test one or more sensors of a device under test may comprise capturing visual motion data of the device under test disposed on an arm of a pendulum apparatus while the arm of the pendulum apparatus is in motion, capturing data from the one or more sensors while the arm of the pending apparatus is in motion, and comparing the visual motion data with the data from the one or more sensors to determine a relationship between the visual motion data and the data from the one or more sensors.
Abstract:
Embodiments of the invention provide methods for forming electrical connections using liquid metals. Electrical connections that employ liquid metals are useful for testing and validation of semiconductor devices. Electrical connections are formed between the probes of a testing interface and the electronic interface of a device under test through a liquid metal region. In embodiments of the invention, liquid metal interconnects are comprised of gallium or liquid metal alloys of gallium. The use of liquid metal contacts does not require a predetermined amount of force be applied in order to reliably make an electrical connection.
Abstract:
An apparatus includes a metallization region including a plurality of metal layers on a device layer of a substrate, a via extending through the substrate and the device layer, and a heat spreading and stress engineering region in the substrate and adjacent to the device layer. The via contacts a metal layer in the metallization region.
Abstract:
A stacked die package includes a substrate (210, 310), a first die (220, 320) above the substrate, a spacer (230, 330) above the first die, a second die (240, 340) above the spacer, and a mold compound (250, 370) disposed around at least a portion of the first die, the spacer, and the second die. The spacer includes a heat transfer conduit (231, 331, 333, 351, 353) representing a path of lower overall thermal resistance than that offered by the mold compound itself. The heat transfer path created by the heat transfer conduit may result in better thermal performance, higher power dissipation rates, and/or lower operating temperatures for the stacked die package.