公开(公告)号：US10248499B2

公开(公告)日：2019-04-02

申请号：US15192901

申请日：2016-06-24

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rohit Sehgal ,  Nian Niles Yang

IPC: G06F11/10 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26 ,  G11C29/42 ,  G11C29/44 ,  G11C29/52 ,  G11C29/00

Abstract: A first phase of a programming process is performed to program data into a set of non-volatile memory cells using a set of verify references and allowing for a first number of programming errors. After completing the first phase of programming, an acknowledgement is provided to the host that the programming was successful. The memory system reads the data from the set of non-volatile memory cells and uses an error correction process to identify and correct error bits in the data read. When the memory system is idle and after the acknowledgement is provided to the host, the memory system performs a second phase of the programming process to program the corrected error bits into the set of the non-volatile memory cells using the same set of verify references and allowing for a second number of programming errors.

公开(公告)号：US10008277B2

公开(公告)日：2018-06-26

申请号：US15262262

申请日：2016-09-12

Applicant: SanDisk Technologies LLC

Inventor： Liang Pang ,  Xuehong Yu ,  Yingda Dong ,  Nian Niles Yang

IPC: G11C16/34 ,  G11C16/28 ,  G11C16/16 ,  G11C16/04 ,  G11C16/10 ,  G11C16/08 ,  H01L27/1157 ,  H01L27/11582

CPC classification number: G11C16/3495 ,  G11C7/14 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/28 ,  G11C16/3445 ,  G11C16/349 ,  H01L27/1157 ,  H01L27/11582

Abstract: Techniques are provided for measuring the endurance of a set of data memory cells by evaluating the threshold voltage (Vth) of associated dummy memory cells. A cell has a high endurance or good data retention if it is able to maintain the charges. However, there can be a variation in the endurance of cells even within a single die. By evaluating the dummy memory cells, an early warning can be obtained of a degradation of the data memory cells. Moreover, there is no interference with the operation of the data memory cells. Based on a number of dummy memory cells which have a Vth below a demarcation voltage, a corrective action is taken such as adjusting read voltages, an initial program voltage and/or an initial erase voltage, or marking the block as being bad and recovering the data.

公开(公告)号：US09910749B2

公开(公告)日：2018-03-06

申请号：US15191150

申请日：2016-06-23

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Nian Niles Yang ,  Jiahui Yuan ,  Grishma Shah ,  Xinde Hu ,  Lanlan Gu ,  Bin Wu

IPC: G11C16/04 ,  G06F11/20 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16

CPC classification number: G06F11/2094 ,  G06F2201/805 ,  G06F2201/82 ,  G11C8/08 ,  G11C8/14 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3495 ,  G11C29/025 ,  G11C2029/1202

Abstract: A non-volatile memory system includes a plurality of non-volatile data memory cells arranged into groups of data memory cells, a plurality of select devices connected to the groups of data memory cells, a selection line connected to the select devices, a plurality of data word lines connected to the data memory cells, and one or more control circuits connected to the selection line and the data word lines. The one or more control circuits are configured to determine whether the select devices are corrupted. If the select devices are corrupted, then the one or more control circuits repurpose one of the word lines (e.g., the first data word line closet to the select devices) to be another selection line, thus operating the memory cells connected to the repurposed word line as select devices.

公开(公告)号：US20180053562A1

公开(公告)日：2018-02-22

申请号：US15240188

申请日：2016-08-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Phil Reusswig ,  Joanna Lai ,  Deepak Raghu ,  Grishma Shah ,  Nian Niles Yang

IPC: G11C16/34 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52 ,  G11C16/22 ,  G11C16/26

CPC classification number: G11C16/3431 ,  G06F11/1068 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3427 ,  G11C29/021 ,  G11C29/028 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/0409

Abstract: A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open word line of the particular block. The number of errors in the sensed data is determined. If the number of errors is greater than a limit, then the system takes an action to mitigate the read disturb.

公开(公告)号：US09846554B1

公开(公告)日：2017-12-19

申请号：US15228910

申请日：2016-08-04

Applicant: SanDisk Technologies LLC

Inventor： Joanna Lai ,  Nian Niles Yang

IPC: G11C16/04 ,  G06F3/06

CPC classification number: G06F3/0679 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0688 ,  G11C29/80

Abstract: A storage system and method for generating block allocation groups based on deterministic data patterns are provided. A storage system is provided comprising a memory comprising a plurality of blocks and a controller. The controller is configured to infer characteristics of the memory from data patterns of data stored in the plurality of blocks; and group the plurality of blocks based on the inferred characteristics of the memory.

公开(公告)号：US09837146B2

公开(公告)日：2017-12-05

申请号：US15195927

申请日：2016-06-28

Applicant: SanDisk Technologies LLC

Inventor： Nian Niles Yang ,  Chris Nga Yee Yip

IPC: G11C11/56

CPC classification number: G11C11/5642 ,  G11C7/04 ,  G11C11/5628

Abstract: Systems, methods and/or devices are used to adjust a read property for a memory portion of non-volatile memory. In one aspect, in response to receiving a program request, the device: detects a first temperature of the memory portion; and stores first temperature data corresponding to the detected first temperature. In response to receiving a read request, the device performs an adjustment determination, including: detecting a second temperature of the memory portion of the non-volatile memory, retrieving the stored first temperature data, and determining, in accordance with the detected second temperature and the retrieved first temperature data, whether to perform the read using an adjusted read property. In accordance with a determination to perform the read using the adjusted read property, the device performs a read on the memory portion using the adjusted read property.

公开(公告)号：US09811267B1

公开(公告)日：2017-11-07

申请号：US15294313

申请日：2016-10-14

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Nian Niles Yang ,  Grishma Shah ,  Phil Reusswig ,  Dmitry Vaysman

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F1/206 ,  G06F3/0655 ,  G06F3/0688 ,  G11C7/04 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3459 ,  H01L27/11582

Abstract: A non-volatile storage apparatus comprises a controller, one or more memory packages, a system temperature sensor, and one or more memory temperature sensors. The system temperature sensor is located at or on the controller. Each of the one or more memory temperature sensors are positioned at one of the one or more memory packages. The controller monitors system temperature using the system temperature sensor. If the system temperature is above a first threshold, then temperature is sensed at the memory packages using the one or more memory temperature sensors. Individual memory packages have their performance throttled if their temperature exceeds a second threshold.

公开(公告)号：US20190130982A1

公开(公告)日：2019-05-02

申请号：US15798648

申请日：2017-10-31

Applicant: SanDisk Technologies LLC

Inventor： Philip David Reusswig ,  Nian Niles Yang ,  Anubhav Khandelwal

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/26 ,  G06F11/10 ,  G11C29/52

Abstract: Over a period of operation, non-volatile memory can develop a residual resistance that is impractical to remove. For example, in a NAND string of memory cells, trapped charge may build up in a region between the bit lines and drain side select gates, so that even when all the devices of a NAND string are in an “on” state, the NAND string will not conduct. This effect will skew both hard bit data determinations, indicating the data state of a selected memory cell, and soft bit data determinations which may correlate to the reliability of the hard bit data. Techniques are described to factor in such excessive residual resistance when determining the soft bit data.

公开(公告)号：US20170139761A1

公开(公告)日：2017-05-18

申请号：US15195910

申请日：2016-06-28

Applicant: SanDisk Technologies LLC

Inventor： Yiwei Song ,  Nian Niles Yang ,  James Fitzpatrick

IPC: G06F11/07

CPC classification number: G06F11/073 ,  G06F11/0754 ,  G06F11/076 ,  G06F11/1072 ,  G06F12/02 ,  G11C16/349 ,  G11C29/4401 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: Systems, methods and/or devices are used to adjust error metrics for a memory portion of non-volatile memory in a storage device. In one aspect, a first write and a first read are performed on the memory portion. In accordance with results of the first read, a first error metric value for the memory portion is determined. In accordance with a determination that the first error metric value exceeds a first threshold value, an entry for the memory portion is added to a table. After the first write, when a second write to the memory portion is performed, it is determined whether the entry for the memory portion is present in the table. In accordance with a determination that the entry for the memory portion is present in the table, the second write uses a first error adjustment characteristic that is determined in accordance with the first error metric value.

公开(公告)号：US10228990B2

公开(公告)日：2019-03-12

申请号：US15195910

申请日：2016-06-28

Applicant: SanDisk Technologies LLC

Inventor： Yiwei Song ,  Nian Niles Yang ,  James Fitzpatrick

IPC: G06F11/07 ,  G06F12/02 ,  G11C16/34 ,  G06F11/08 ,  G11C29/44 ,  G11C29/04

Abstract: Systems, methods and/or devices are used to adjust error metrics for a memory portion of non-volatile memory in a storage device. In one aspect, a first write and a first read are performed on the memory portion. In accordance with results of the first read, a first error metric value for the memory portion is determined. In accordance with a determination that the first error metric value exceeds a first threshold value, an entry for the memory portion is added to a table. After the first write, when a second write to the memory portion is performed, it is determined whether the entry for the memory portion is present in the table. In accordance with a determination that the entry for the memory portion is present in the table, the second write uses a first error adjustment characteristic that is determined in accordance with the first error metric value.