公开(公告)号：US20240332413A1

公开(公告)日：2024-10-03

申请号：US18612646

申请日：2024-03-21

Applicant: STMicroelectronics International N.V.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI ,  Maria Eloisa CASTAGNA ,  Aurore CONSTANT ,  Cristina TRINGALI

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462

Abstract: The HEMT device has a body including a heterostructure configured to generate a 2-dimensional charge-carrier gas; and a gate structure which extends on a top surface of the body and is biasable to electrically control the 2-dimensional charge-carrier gas. The gate structure has a channel modulating region of semiconductor material; a functional region of semiconductor material; and a gate contact region of conductive material. The functional region and the gate contact region extend on a top surface of the channel modulating region and the gate contact region is arranged laterally with respect to the functional region. The channel modulating region has a different conductivity type with respect to the functional region.

公开(公告)号：US20240304713A1

公开(公告)日：2024-09-12

申请号：US18591344

申请日：2024-02-29

Applicant: STMicroelectronics International N.V.

Inventor： Ferdinando IUCOLANO ,  Aurore CONSTANT ,  Cristina TRINGALI ,  Maria Eloisa CASTAGNA

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66462

Abstract: An HEMT device is formed on a semiconductor body having a semiconductive heterostructure. A control region of a semiconductor material, is arranged on the semiconductor body and has a top surface and lateral sides. A control terminal, of conductive material, extends on and in contact with the top surface of the control region. A passivation layer of non-conductive material, extends on the semiconductor body, partially on the top surface of the control region and on the lateral sides of the control region, laterally and at a distance from the control terminal.

公开(公告)号：US20250142864A1

公开(公告)日：2025-05-01

申请号：US18385067

申请日：2023-10-30

Applicant: STMicroelectronics International N.V.

Inventor： Ferdinando IUCOLANO ,  Cristina TRINGALI ,  Maria Eloisa CASTAGNA ,  Giovanni GIORGINO ,  Aurore CONSTANT ,  Virgil GUILLON

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/66

Abstract: Methods, systems, and apparatuses for normally off HEMT are provided, including for in situ plasma treatment before Al2O3 deposition for improved on on-hydrogen-based resistance. An exemplary method may include providing a wafer comprising a AlGaN layer and a p-GaN layer; etching the p-GaN layer to form a p-GaN gate; depositing a first aluminum oxide layer over the p-GaN gate; depositing a silicon dioxide layer over the aluminum layer; etching the silicon dioxide layer and the aluminum oxide layer to expose a first portion of the AlGaN layer starting a first distance from the p-GaN gate; treating the first portion of the AlGaN layer with an in-situ hydrogen-based plasma treatment, wherein the in situ plasma treatment deactivates magnesium in the first portion of the AlGaN layer; and forming at least a first normally-off HEMT, wherein the gate of the normally-off HEMT is the first p-GaN gate.

公开(公告)号：US20240304711A1

公开(公告)日：2024-09-12

申请号：US18592816

申请日：2024-03-01

Applicant: STMicroelectronics International N.V.

Inventor： Cristina TRINGALI ,  Aurore CONSTANT ,  Maria Eloisa CASTAGNA ,  Ferdinando IUCOLANO

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462

Abstract: A HEMT transistor is formed on a semiconductor body having a semiconductive heterostructure. A gate region of a semiconductor material, is arranged on the semiconductor body and has lateral sides. Sealing regions of non-conductive material extend on the lateral sides of the gate region; and a passivation layer of non-conductive material has surface portions extending on the semiconductor body, on both sides of the gate region and at a distance therefrom. The sealing regions and the passivation regions have different characteristic, such as are of different material or have different thicknesses.

公开(公告)号：US20240304710A1

公开(公告)日：2024-09-12

申请号：US18591541

申请日：2024-02-29

Applicant: STMicroelectronics International N.V.

Inventor： Cristina TRINGALI ,  Aurore CONSTANT ,  Maria Eloisa CASTAGNA ,  Ferdinando IUCOLANO

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/0603 ,  H01L29/402 ,  H01L29/66431 ,  H01L29/66462

Abstract: A HEMT transistor has a body having a top surface and a heterostructure, and a gate region having a semiconductor material and arranged on the top surface of the body. The gate region has a first lateral sidewall and a second lateral sidewall opposite to the first lateral sidewall. The HEMT device further has a sealing layer of non-conductive material that extends on and in contact with the first and the second lateral sidewalls of the gate region; and a passivation layer of non-conductive material that has a surface portion. The surface portion extends on the top surface of the body, laterally to the first lateral sidewall of the gate region. The sealing layer and the passivation layer have different geometrical parameters and/or are of different material.

公开(公告)号：US20250142862A1

公开(公告)日：2025-05-01

申请号：US18385137

申请日：2023-10-30

Applicant: STMicroelectronics International N.V.

Inventor： Giovanni GIORGINO ,  Maria Eloisa CASTAGNA ,  Virgil GUILLON ,  Cristina TRINGALI ,  Ferdinando IUCOLANO ,  Aurore CONSTANT

IPC: H01L29/778 ,  H01L21/02 ,  H01L21/8252 ,  H01L27/06 ,  H01L27/088 ,  H01L29/08 ,  H01L29/20 ,  H01L29/66

Abstract: Methods, systems, and apparatuses for normally-on GaN high electron mobility transistors (HEMT) integration on monolithic p-GaN integrated circuits (ICs) platforms are provided. In particular, the integrated circuit platforms may include both enhancement mode and depletion mode HEMT power devices in monolithically integrated p-GaN power ICs. Exemplary methods may include treating at least one of a plurality of p-GaN gates with an in-situ plasma treatment to deactivate Mg in the p-GaN gate treated and deplete this p-Gan gate of Mg. The depleted p-GaN gate may be the gate for the normally on HEMT in the IC. At least one of the p-GaN gates not exposed to the in-situ plasma pretreatment may be the gate of the normally off HEMT in the IC.

公开(公告)号：US20240313102A1

公开(公告)日：2024-09-19

申请号：US18596536

申请日：2024-03-05

Applicant: STMicroelectronics International N.V.

Inventor： Cristina MICCOLI ,  Ferdinando IUCOLANO ,  Cristina TRINGALI ,  Maria Eloisa CASTAGNA ,  Alessandro CHINI

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66462

Abstract: An integrated power device includes a heterostructure, having a channel layer and a barrier layer, a source contact, a drain contact, and a gate region, arranged on the barrier layer between the source contact and the drain contact. An insulating field structure is arranged on the barrier layer between the gate region and the drain contact. A field plate extends over the insulating field structure. The insulating field structure includes a first dielectric region made of a first dielectric material on the barrier layer and a second dielectric region made of a second dielectric material, selectively etchable with respect to the first dielectric material on the first dielectric region. On a side of the insulating field structure towards the gate region, the field plate is in contact with the first dielectric region.

公开(公告)号：US20250142928A1

公开(公告)日：2025-05-01

申请号：US18497482

申请日：2023-10-30

Applicant: STMicroelectronics International N.V.

Inventor： Cristina TRINGALI ,  Alessandro CONTARINO ,  Raffaella PEZZUTO ,  Ferdinando IUCOLANO ,  Maria Eloisa CASTAGNA ,  Aurore CONSTANT

IPC: H01L29/417 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

Abstract: Various embodiments of the present disclosure disclose improved gallium nitride (GaN) power devices and methods of fabrication of such devices. A method for fabricating a GaN device may include providing a semiconductor base material with a first and second side. The semiconductor base material includes a GaN material, a frontside barrier layer, and a backside barrier layer. A pGaN landing is formed on a first region of the semiconductor base material and an ohmic contact is formed on a second region of the semiconductor base material. The ohmic contact includes one or more via contact landing and one or more backside barrier contacts that make direct contact with the backside barrier layer.

公开(公告)号：US20240405115A1

公开(公告)日：2024-12-05

申请号：US18671584

申请日：2024-05-22

Applicant: STMicroelectronics International N.V.

Inventor： Maria Eloisa CASTAGNA ,  Giovanni GIORGINO ,  Ferdinando IUCOLANO ,  Cristina TRINGALI ,  Aurore CONSTANT

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66

Abstract: A HEMT device including: a semiconductor body forming a heterostructure; a gate region on the semiconductor body and elongated along a first axis; a gate metal region including a lower portion on the gate region and recessed with respect to the gate region, and a upper portion on the lower portion and having a width greater that the lower portion along a second axis; a source metal region extending on the semiconductor body and made in part of aluminum; a drain metal region on the semiconductor body, the source metal region and the drain metal region on opposite sides of the gate region; a first conductivity enhancement region of aluminum nitride, extending on the semiconductor body and interposed between the source metal region and the gate region, the first conductivity enhancement region being in direct contact with the source metal region and being separated from the gate region.

公开(公告)号：US20240404945A1

公开(公告)日：2024-12-05

申请号：US18670500

申请日：2024-05-21

Applicant: STMicroelectronics International N.V.

Inventor： Antonio Filippo Massimo PIZZARDI ,  Santo Alessandro SMERZI ,  Ferdinando IUCOLANO

IPC: H01L23/528 ,  H01L21/768 ,  H01L29/66 ,  H01L29/778

Abstract: A heterojunction power device includes: a substrate containing semiconductor material; a first active area and a second active area, arranged on the substrate symmetrically opposite with respect to an axis of symmetry and accommodating respective heterostructures; a separation region, extending along the axis of symmetry between the first active area and the second active area. The power device further includes: a first conductive bus configured to distribute a first electric potential of the power device in parallel to the first and the second active areas; a second conductive bus configured to distribute a second electric potential of the power device, different from the first electric potential, in parallel to the first and the second active areas. The first and the second conductive buses extend along the axis of symmetry above the separation region and the second conductive bus overlies the first conductive bus.