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    Memory system and method of operating the same
    1.
    发明授权
    Memory system and method of operating the same 有权

    公开(公告)号：US11972136B2

    公开(公告)日：2024-04-30

    申请号：US18045948

    申请日：2022-10-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Seok Kim ,  Dae-Ho Kim ,  Yong-Geun Oh ,  Sung-Jin Moon

    IPC: G06F3/06 ,  G06F11/30

    CPC classification number: G06F3/0653 ,  G06F3/0616 ,  G06F3/0634 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/3058

    Abstract: A method of operating a memory system, which includes a memory controller and at least one non-volatile memory, includes storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, setting an operation performance level of the memory system to a first performance level, operating the memory controller and the at least one non-volatile memory device according to the first performance level, detecting an internal temperature of the memory system, and changing the operation performance level of the memory system to a second performance level that is different from the first performance level. The operation performance level is changed by the memory controller of the memory system, and changing the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature.

    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
    2.
    发明申请
    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME 审中-公开

    公开(公告)号：US20190155538A1

    公开(公告)日：2019-05-23

    申请号：US16241488

    申请日：2019-01-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-Seok Kim ,  Dae-Ho Kim ,  Yong-Geun Oh ,  Sung-Jin Moon

    IPC: G06F3/06

    Abstract: A method of operating a memory system, which includes a memory controller and at least one non-volatile memory, includes storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, setting an operation performance level of the memory system to a first performance level, operating the memory controller and the at least one non-volatile memory device according to the first performance level, detecting an internal temperature of the memory system, and changing the operation performance level of the memory system to a second performance level that is different from the first performance level. The operation performance level is changed by the memory controller of the memory system, and changing the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature.

    Circuit for controlling power output from battery pack and battery pack
    3.
    发明授权
    Circuit for controlling power output from battery pack and battery pack 有权

    公开(公告)号：US10530167B2

    公开(公告)日：2020-01-07

    申请号：US15820738

    申请日：2017-11-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yong-Seung Yi ,  Du-Hyun Kim ,  Hyun-Seok Kim ,  Ho-Yeong Lim ,  Byeng-Sang Jung

    IPC: H02J7/00 ,  H01M10/42 ,  H01M10/44 ,  H01M10/48

    Abstract: A portable communication device, according to various embodiments of the present disclosure, may include: a battery pack; a power dissipation element disposed outside the battery pack; a detecting circuit configured to detect the state of the battery pack; and at least one of first switches that are connected to the battery pack and the detecting circuit, wherein the detecting circuit is configured to control at least one of the first switches to: electrically disconnect the power dissipation element from the battery pack when the state of the battery pack does not satisfy a specified condition; and electrically connect the power dissipation element to the battery pack when the state of the battery pack satisfies the specified condition.

    Memory system capable of controlling operation performance according to temperature and method of operating the same
    4.
    发明授权
    Memory system capable of controlling operation performance according to temperature and method of operating the same 有权

    公开(公告)号：US10198214B2

    公开(公告)日：2019-02-05

    申请号：US14601552

    申请日：2015-01-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Seok Kim ,  Dae-Ho Kim ,  Yong-Geun Oh ,  Sung-Jin Moon

    IPC: G06F3/06 ,  G06F11/30

    Abstract: A method of operating a memory system, which includes a memory controller and at least one non-volatile memory, includes storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, setting an operation performance level of the memory system to a first performance level, operating the memory controller and the at least one non-volatile memory device according to the first performance level, detecting an internal temperature of the memory system, and changing the operation performance level of the memory system to a second performance level that is different from the first performance level. The operation performance level is changed by the memory controller of the memory system, and changing the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature.

    Memory system having memory controller with cache memory and NVRAM and method of operating same
    5.
    发明授权
    Memory system having memory controller with cache memory and NVRAM and method of operating same 有权
    具有高速缓冲存储器和NVRAM的存储器控​​制器的存储器系统及其操作方法

    公开(公告)号：US09396107B2

    公开(公告)日：2016-07-19

    申请号：US14079661

    申请日：2013-11-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joon-Ho Lee ,  Hyun-Seok Kim

    IPC: G06F12/00 ,  G06F12/02 ,  G06F9/44 ,  G06F12/10

    CPC classification number: G06F12/0246 ,  G06F9/4411 ,  G06F12/10 ,  G06F12/1009 ,  G06F2212/7201 ,  G06F2212/7209

    Abstract: In a memory system including a flash memory and a memory controller having a cache memory and a nonvolatile random access memory (NVRAM), a method of operating the memory system includes; receiving a write request specifying a write operation directed to a page of a designated active write block in the flash memory, storing a page mapping table for the active write block in the cache memory, generating update information for the page mapping table stored in the cache memory as a result of executing the write operation, and storing the update information in the NVRAM, and storing an updated version of the page mapping table in the flash memory after execution of the write operation is complete.

    Abstract translation: 在包括闪速存储器和具有高速缓冲存储器和非易失性随机存取存储器（NVRAM）的存储器控​​制器的存储器系统中，操作存储器系统的方法包括： 接收写入请求，指定指向闪速存储器中指定的活动写入块的页面的写入操作，将用于所述活动写入块的页面映射表存储在所述高速缓冲存储器中，生成存储在所述高速缓存器中的所述页面映射表的更新信息 作为执行写入操作的结果的存储器，并且将更新信息存储在NVRAM中，并且在执行写入操作之后将页面映射表的更新版本存储在闪存中。

    Method for controlling a plurality of batteries and electronic device thereof
    6.
    发明授权
    Method for controlling a plurality of batteries and electronic device thereof 有权

    公开(公告)号：US11133535B2

    公开(公告)日：2021-09-28

    申请号：US16021855

    申请日：2018-06-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Du-Hyun Kim ,  Hyun-Seok Kim ,  Yongseung Yi ,  Hoyeong Lim ,  Dong-Il Son

    IPC: H01M10/42 ,  H01M10/48 ,  H02J7/00 ,  H01M10/44 ,  H02J7/34 ,  H01M50/20 ,  H01M50/543 ,  H01M50/581

    Abstract: A method for controlling a plurality of batteries and an electronic device thereof are provided. The electronic device includes a power management circuit configured to supply power to the electronic device; a first battery electrically connected with a power input port of the power management circuit; a second battery electrically connected with the power input port; a first charging circuit configured to charge the first battery; a second charging circuit configured to charge the second battery; a first current control circuit electrically connected between the first charging circuit and the first battery, and configured to control a first charging current supplied from the first charging circuit to the first battery and a leakage current due to a voltage difference between the first battery and the second battery; and a second current control circuit electrically connected between the second charging circuit and the second battery, and configured to control a second charging current supplied from the second charging circuit to the second battery and the leakage current.

    Memory system and method of operating the same
    8.
    发明授权
    Memory system and method of operating the same 有权

    公开(公告)号：US11093166B2

    公开(公告)日：2021-08-17

    申请号：US16241488

    申请日：2019-01-07

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Seok Kim ,  Dae-Ho Kim ,  Yong-Geun Oh ,  Sung-Jin Moon

    IPC: G06F3/06 ,  G06F11/30

    Abstract: A method of operating a memory system, which includes a memory controller and at least one non-volatile memory, includes storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, setting an operation performance level of the memory system to a first performance level, operating the memory controller and the at least one non-volatile memory device according to the first performance level, detecting an internal temperature of the memory system, and changing the operation performance level of the memory system to a second performance level that is different from the first performance level. The operation performance level is changed by the memory controller of the memory system, and changing the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature.

    Memory system and method of operating the same
    10.
    发明授权
    Memory system and method of operating the same 有权

    公开(公告)号：US11960752B2

    公开(公告)日：2024-04-16

    申请号：US17357084

    申请日：2021-06-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Seok Kim ,  Dae-Ho Kim ,  Yong-Geun Oh ,  Sung-Jin Moon

    IPC: G06F3/06 ,  G06F11/30

    CPC classification number: G06F3/0653 ,  G06F3/0616 ,  G06F3/0634 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/3058

    Abstract: A method of operating a memory system, which includes a memory controller and at least one non-volatile memory, includes storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, setting an operation performance level of the memory system to a first performance level, operating the memory controller and the at least one non-volatile memory device according to the first performance level, detecting an internal temperature of the memory system, and changing the operation performance level of the memory system to a second performance level that is different from the first performance level. The operation performance level is changed by the memory controller of the memory system, and changing the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature.

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