公开(公告)号：US09396080B2

公开(公告)日：2016-07-19

申请号：US14454482

申请日：2014-08-07

Applicant: SanDisk Technologies Inc.

Inventor： Ashutosh Malshe ,  Neil Richard Darragh ,  Karthik Krishnamoorthy

IPC: G06F11/00 ,  G06F11/20 ,  G06F11/07

CPC classification number: G06F11/2094 ,  G06F11/073 ,  G06F11/076 ,  G06F11/0793 ,  G06F2201/81

Abstract: A method for analyzing a read error event is provided comprising reading a page of data stored in memory, determining a read error event for the page of data, and identifying a scope of the read error event in the memory. In another embodiment, a method for performing a preliminary read error recovery is provided comprising reading a first data unit from memory and identifying a bit error rate for a first data unit with a correction engine, determining that the bit error rate is above a threshold, accessing a data structure including entries identifying data units and read error event information associated with the data units, identifying a second data unit in an entry that matches the first data unit, and performing a preliminary read error recovery process on the first data unit using the information in the entry to reduce the bit error rate below the threshold.

Abstract translation: 提供了一种用于分析读取错误事件的方法，包括读取存储在存储器中的数据页面，确定数据页面的读取错误事件，以及识别存储器中的读取错误事件的范围。 在另一个实施例中，提供了一种用于执行初步读取错误恢复的方法，包括从存储器读取第一数据单元并且利用校正引擎识别第一数据单元的误码率，确定误码率高于阈值， 访问包括标识数据单元的条目和与数据单元相关联的读取错误事件信息的数据结构，识别与第一数据单元匹配的条目中的第二数据单元，以及使用第一数据单元对第一数据单元执行初步读取错误恢复处理 条目中的信息减少了误码率低于阈值。

公开(公告)号：US20160077911A1

公开(公告)日：2016-03-17

申请号：US14486704

申请日：2014-09-15

Applicant: SanDisk Technologies Inc.

Inventor： Ashutosh Malshe ,  Karthik Krishnamoorthy

IPC: G06F11/10 ,  G11C29/52

CPC classification number: G06F11/1068 ,  G06F11/1016 ,  G11C8/20 ,  G11C16/08 ,  G11C29/52 ,  G11C2029/0411

Abstract: Methods, systems, and computer readable media for address and data integrity checking in flash memory operations are disclosed. One method includes, at a storage controller, generating, for an address unit, an address parity unit. The method further includes generating a command sequence including the address unit, the address parity unit, and an operation command specifying an operation to be performed on a flash memory array. The method further includes providing the command sequence to a flash memory device that includes the non-volatile memory array. The method further includes performing, by the flash memory device, an address integrity check on the address unit using the address parity unit. The method further includes determining whether or not to perform an operation specified by the command sequence based at least in part on a result of the address integrity check.

Abstract translation: 公开了用于闪速存储器操作中的地址和数据完整性检查的方法，系统和计算机可读介质。 一种方法包括在存储控制器处为地址单元生成地址奇偶校验单元。 该方法还包括产生包括地址单元，地址奇偶校验单元和指定要对闪存阵列执行的操作的操作命令的命令序列。 该方法还包括向包括非易失性存储器阵列的闪存器件提供命令序列。 该方法还包括使用地址奇偶校验单元，通过闪存设备执行对地址单元的地址完整性检查。 该方法还包括至少部分地基于地址完整性检查的结果来确定是否执行由命令序列指定的操作。

公开(公告)号：US20160041891A1

公开(公告)日：2016-02-11

申请号：US14454482

申请日：2014-08-07

Applicant: SanDisk Technologies Inc.

Inventor： Ashutosh Malshe ,  Neil Richard Darragh ,  Karthik Krishnamoorthy

IPC: G06F11/20 ,  G06F11/07

CPC classification number: G06F11/2094 ,  G06F11/073 ,  G06F11/076 ,  G06F11/0793 ,  G06F2201/81

Abstract: A method for analyzing a read error event is provided comprising reading a page of data stored in memory, determining a read error event for the page of data, and identifying a scope of the read error event in the memory. In another embodiment, a method for performing a preliminary read error recovery is provided comprising reading a first data unit from memory and identifying a bit error rate for a first data unit with a correction engine, determining that the bit error rate is above a threshold, accessing a data structure including entries identifying data units and read error event information associated with the data units, identifying a second data unit in an entry that matches the first data unit, and performing a preliminary read error recovery process on the first data unit using the information in the entry to reduce the bit error rate below the threshold.

Abstract translation: 提供了一种用于分析读取错误事件的方法，包括读取存储在存储器中的数据页面，确定数据页面的读取错误事件，以及识别存储器中的读取错误事件的范围。 在另一个实施例中，提供了一种用于执行初步读取错误恢复的方法，包括从存储器读取第一数据单元并且利用校正引擎识别第一数据单元的误码率，确定误码率高于阈值， 访问包括标识数据单元的条目和与数据单元相关联的读取错误事件信息的数据结构，识别与第一数据单元匹配的条目中的第二数据单元，以及使用第一数据单元对第一数据单元执行初步读取错误恢复处理 条目中的信息减少了误码率低于阈值。

公开(公告)号：US09477549B2

公开(公告)日：2016-10-25

申请号：US14486704

申请日：2014-09-15

Applicant: SanDisk Technologies Inc.

Inventor： Ashutosh Malshe ,  Karthik Krishnamoorthy

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/52 ,  G11C8/20 ,  G11C16/08 ,  G11C29/04

CPC classification number: G06F11/1068 ,  G06F11/1016 ,  G11C8/20 ,  G11C16/08 ,  G11C29/52 ,  G11C2029/0411

Abstract: Methods, systems, and computer readable media for address and data integrity checking in flash memory operations are disclosed. One method includes, at a storage controller, generating, for an address unit, an address parity unit. The method further includes generating a command sequence including the address unit, the address parity unit, and an operation command specifying an operation to be performed on a flash memory array. The method further includes providing the command sequence to a flash memory device that includes the non-volatile memory array. The method further includes performing, by the flash memory device, an address integrity check on the address unit using the address parity unit. The method further includes determining whether or not to perform an operation specified by the command sequence based at least in part on a result of the address integrity check.

Abstract translation: 公开了用于闪速存储器操作中的地址和数据完整性检查的方法，系统和计算机可读介质。 一种方法包括在存储控制器处为地址单元生成地址奇偶校验单元。 该方法还包括产生包括地址单元，地址奇偶校验单元和指定要对闪存阵列执行的操作的操作命令的命令序列。 该方法还包括向包括非易失性存储器阵列的闪存器件提供命令序列。 该方法还包括使用地址奇偶校验单元，通过闪存设备执行对地址单元的地址完整性检查。 该方法还包括至少部分地基于地址完整性检查的结果来确定是否执行由命令序列指定的操作。