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公开(公告)号:US20180157587A1
公开(公告)日:2018-06-07
申请号:US15604994
申请日:2017-05-25
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Christopher PETTI , Srikanth RANGANATHAN
CPC classification number: G06F12/06 , G11C13/0014 , G11C13/0019 , G11C13/004 , G11C13/0069
Abstract: A method of writing data to a DNA strand comprises cutting an address block of a selected address-data block unit of the DNA strand to form first and second DNA strings, and inserting a replacement address-data block that includes a replacement data segment between the first DNA string and the second DNA string to provide a rewritten DNA strand having valid address followed by valid data and an invalid address followed by invalid data.
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公开(公告)号:US20180197988A1
公开(公告)日:2018-07-12
申请号:US15400244
申请日:2017-01-06
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Perumal RATNAM , Christopher PETTI , Juan SAENZ , Guangle ZHOU , Abhijit BANDYOPADHYAY , Tanmay KUMAR
IPC: H01L29/78 , H01L29/423 , H01L23/528 , H01L27/24 , H01L29/66
CPC classification number: H01L29/7827 , H01L23/5283 , H01L27/2454 , H01L29/42364 , H01L29/42376 , H01L29/66666 , H01L29/78642 , H01L29/78648
Abstract: A matrix rail structure is formed over a substrate. The matrix rail structure includes a pair of lengthwise sidewalls that extend along a first horizontal direction and comprises, or is at least partially subsequently replaced with, a set of at least one gate electrode rail extending along the first horizontal direction and straight-sidewalled gate dielectrics. A pair of vertical semiconductor channel strips and a pair of laterally-undulating gate dielectrics can be formed on sidewalls of the matrix rail structure for each vertical field effect transistor. At least one laterally-undulating gate electrode extending along the first horizontal direction is formed on the laterally-undulating gate dielectrics. Bottom active regions and top active regions are formed at end portions of the vertical semiconductor channel strips. The vertical field effect transistors can be formed as a two-dimensional array, and may be employed as access transistors for a three-dimensional memory device.
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公开(公告)号:US20190027201A1
公开(公告)日:2019-01-24
申请号:US15728840
申请日:2017-10-10
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Christopher PETTI , Neil ROBERTSON , Abhijit BANDYOPADHYAY
IPC: G11C11/16
CPC classification number: G11C11/1673 , G11C11/16 , G11C11/161 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1675
Abstract: A memory cell includes a VCMA magnetoelectric memory element and a two-terminal selector element connected in series to the magnetoelectric memory element.
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公开(公告)号:US20190288192A1
公开(公告)日:2019-09-19
申请号:US15924944
申请日:2018-03-19
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yuji TAKAHASHI , Vincent SHIH , Christopher PETTI
IPC: H01L45/00
Abstract: A phase change memory device includes first conductive rails laterally extending along a first horizontal direction over a substrate, a rectangular array of memory pillar structures overlying top surfaces of the first conductive rails, and second conductive rails laterally extending along a second horizontal direction and overlying top surfaces of the rectangular array of memory pillar structures. Each memory pillar structure includes a vertical stack of structural elements including, from one end to another, a selector-side conductive element, a selector element, a selector-memory conductive element, a phase change memory element, and a memory-side conductive element. At least one structural element within the vertical stack is a laterally constricted structural element having laterally recessed sidewalls relative to sidewalls of a respective immediately vertically underlying structural element.
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公开(公告)号:US20190221273A1
公开(公告)日:2019-07-18
申请号:US16359846
申请日:2019-03-20
Applicant: SanDisk Technologies LLC
Inventor: Ward PARKINSON , Martin HASSNER , Nathan FRANKLIN , Christopher PETTI
CPC classification number: G11C16/3431 , G06F3/0611 , G06F3/0619 , G06F3/0625 , G06F3/0652 , G06F3/0656 , G06F3/0679 , G06F11/08 , G06F12/0246 , G06F2212/1041 , G06F2212/7202 , G06F2212/7205
Abstract: Apparatuses, systems, methods, and computer program products are disclosed for data rewrite operations. A non-volatile memory device comprises a non-volatile memory medium. A non-volatile memory device is configured to determine an error metric for a non-volatile memory medium in response to a read request for the non-volatile memory medium. A non-volatile memory device is configured to receive a refresh command from a controller over a bus. A non-volatile memory device is configured to rewrite data from a non-volatile memory medium during a predefined time period after receiving a refresh command in response to an error metric satisfying an error threshold.
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