公开(公告)号：US08928044B2

公开(公告)日：2015-01-06

申请号：US12984767

申请日：2011-01-05

Applicant: Yoshitaka Ozeki ,  Yasuhito Kuwahara ,  Shigetaka Toriyama ,  Hiroyuki Ikeda

Inventor： Yoshitaka Ozeki ,  Yasuhito Kuwahara ,  Shigetaka Toriyama ,  Hiroyuki Ikeda

IPC: H01L29/00 ,  H01L29/786 ,  H01L29/423 ,  G02F1/1362

CPC classification number: H01L29/78696 ,  G02F1/13624 ,  G02F1/136286 ,  H01L29/42384 ,  H01L29/78609 ,  H01L29/78645

Abstract: A this film transistor is provided. The thin film transistor includes a semiconductor layer including a source region, a drain region, and a channel region, wherein the channel region is provided between the source region and the drain region; and a gate electrode overlapping with the channel region, wherein the channel region includes at least a portion of a channel width that is configured to at least one of continuously decrease and continuously increase in a lengthwise direction.

Abstract translation: 提供了这种胶片晶体管。 所述薄膜晶体管包括：源区域，漏极区域和沟道区域的半导体层，其中所述沟道区域设置在所述源极区域和所述漏极区域之间; 以及与沟道区重叠的栅极，其中沟道区包括沟道宽度的至少一部分，其被配置为在长度方向上连续减小并连续增加中的至少一个。

公开(公告)号：US07019393B2

公开(公告)日：2006-03-28

申请号：US10920659

申请日：2004-08-18

Applicant: Shigetaka Toriyama

Inventor： Shigetaka Toriyama

IPC: H01L23/48 ,  G02F1/1345

CPC classification number: H01L24/83 ,  G02F1/13452 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0106 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2203/1189

Abstract: On a glass substrate of a liquid crystal display device, electrode parts to which metallic electrodes (bumps) of an IC circuit are connected from an upper part are formed. The electrode parts are formed by opening an interlayer dielectric film at parts corresponding to metal wiring and forming land shaped electrode pads in the opening parts. In this invention, the planar forms of the electrode pads are smaller than the opening parts of the interlayer dielectric film. Thus, the planarization of the peripheral surfaces around the electrode parts is improved. Accordingly, integrated circuit devices (IC) or semiconductor chips can be connected with high reliability.

Abstract translation: 在液晶显示装置的玻璃基板上，形成有IC电路的金属电极（凸块）从上部连接的电极部。 通过在对应于金属布线的部分打开层间电介质膜并在开口部分形成焊盘形电极焊盘来形成电极部分。 在本发明中，电极焊盘的平面形状小于层间绝缘膜的开口部分。 因此，提高了电极部周围的周边表面的平坦化。 因此，可以以高可靠性连接集成电路器件（IC）或半导体芯片。

公开(公告)号：US20050179851A1

公开(公告)日：2005-08-18

申请号：US11103169

申请日：2005-04-11

Applicant: Hisao Hayashi ,  Shigetaka Toriyama

Inventor： Hisao Hayashi ,  Shigetaka Toriyama

IPC: G02F1/1345 ,  G02F1/13 ,  G02F1/1362 ,  G09F9/00 ,  G09F9/30 ,  H05K3/10

CPC classification number: G02F1/13452 ,  G02F1/136286 ,  H05K3/107

Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.

公开(公告)号：US06670641B1

公开(公告)日：2003-12-30

申请号：US09574067

申请日：2000-05-18

Applicant: Kaichi Fukuda ,  Tsutomu Uemoto ,  Hideo Hirayama ,  Shinichi Kawamura ,  Shigetaka Toriyama

Inventor： Kaichi Fukuda ,  Tsutomu Uemoto ,  Hideo Hirayama ,  Shinichi Kawamura ,  Shigetaka Toriyama

IPC: H01L2976

CPC classification number: H01L27/127 ,  G02F1/13454 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78627

Abstract: A thin film transistor (TFT) is provided with a precisely, lightly doped drain (LDD) structure formed on a substrate of insulators, such as a glass sheet. A method of making the TFT and a liquid crystal display device with the same are disclosed. The TFT with the LDD structure include a side wall and a gate insulation layer. An intermediate layer is provided between the side wall and the gate insulation layer. The intermediate layer is different in layer property from the side wall. When the side wall is formed by an anisotropic etching process, the etching can be stopped on the surface of intermediate layer. As a result, the gate insulation layer and the substrate are protected against the etching.

Abstract translation: 薄膜晶体管（TFT）设置有在绝缘体（例如玻璃板）的基板上形成的精确地，轻掺杂的漏极（LDD）结构。 公开了制造TFT的方法和具有该TFT的液晶显示装置。 具有LDD结构的TFT包括侧壁和栅极绝缘层。 在侧壁和栅极绝缘层之间设置中间层。 中间层与侧壁的层性质不同。 当通过各向异性蚀刻工艺形成侧壁时，可以在中间层的表面上停止蚀刻。 结果，保护栅极绝缘层和衬底免受蚀刻。

公开(公告)号：US6096585A

公开(公告)日：2000-08-01

申请号：US980797

申请日：1997-12-01

Applicant: Kaichi Fukuda ,  Tsutomu Uemoto ,  Hideo Hirayama ,  Shinichi Kawamura ,  Shigetaka Toriyama

Inventor： Kaichi Fukuda ,  Tsutomu Uemoto ,  Hideo Hirayama ,  Shinichi Kawamura ,  Shigetaka Toriyama

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L21/00

CPC classification number: H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78627 ,  G02F1/13454

Abstract: A thin film transistor (TFT) is provided with a precisely, lightly doped drain (LDD) structure formed on a substrate of insulators, such as a glass sheet. A method of making the TFT and a liquid crystal display device with the same are disclosed. The TFT with the LDD structure include a side wall and a gate insulation layer. An intermediate layer is provided between the side wall and the gate insulation layer. The intermediate layer is different in layer property from the side wall. When the side wall is formed by an anisotropic etching process, the etching can be stopped on the surface of intermediate layer. As a result, the gate insulation layer and the substrate are protected against the etching.

Abstract translation: 薄膜晶体管（TFT）设置有在绝缘体（例如玻璃板）的基板上形成的精确地，轻掺杂的漏极（LDD）结构。 公开了制造TFT的方法和具有该TFT的液晶显示装置。 具有LDD结构的TFT包括侧壁和栅极绝缘层。 在侧壁和栅极绝缘层之间设置中间层。 中间层与侧壁的层性质不同。 当通过各向异性蚀刻工艺形成侧壁时，可以在中间层的表面上停止蚀刻。 结果，保护栅极绝缘层和衬底免受蚀刻。

公开(公告)号：US20130186462A1

公开(公告)日：2013-07-25

申请号：US13582798

申请日：2011-03-04

Applicant: Hideo Takezoe ,  Won Hoe Koo ,  Suzushi Nishimura ,  Takashi Seki ,  Shigetaka Toriyama ,  Soon Moon Jeong ,  Maki Fukuda ,  Madoka Fukushima ,  Satoshi Masuyama

Inventor： Hideo Takezoe ,  Won Hoe Koo ,  Suzushi Nishimura ,  Takashi Seki ,  Shigetaka Toriyama ,  Soon Moon Jeong ,  Maki Fukuda ,  Madoka Fukushima ,  Satoshi Masuyama

IPC: H01L31/0236 ,  H01L31/18

CPC classification number: H01L31/02366 ,  C08F2222/1026 ,  C08F2222/104 ,  C09D153/00 ,  C09D183/04 ,  H01L31/022466 ,  H01L31/022483 ,  H01L31/0392 ,  H01L31/1884 ,  Y02E10/50

Abstract: A transparent electroconductive substrate for a solar cell, comprising: a transparent supporting substrate; a transparent electroconductive layer; and a cured resin layer placed between the transparent supporting substrate and the transparent electroconductive layer, wherein concavities and convexities are formed on a surface of the cured resin layer, the surface facing the transparent electroconductive layer, and when a Fourier-transformed image is obtained by performing two-dimensional fast Fourier transform processing on a concavity and convexity analysis image obtained by analyzing a shape of the concavities and convexities by use of an atomic force microscope, the Fourier-transformed image shows a circular or annular pattern substantially centered at an origin at which an absolute value of wavenumber is 0 μm−1, and the circular or annular pattern is present within a region where an absolute value of wavenumber is within a range from 0.5 to 10 μm−1.

Abstract translation: 一种用于太阳能电池的透明导电衬底，包括：透明支撑衬底; 透明导电层; 以及设置在透明支撑基板和透明导电层之间的固化树脂层，其中在固化树脂层的表面上形成凹凸，面向透明导电层的表面，当傅立叶变换图像通过 对通过使用原子力显微镜分析凹凸的形状而获得的凹凸分析图像进行二维快速傅立叶变换处理，傅里叶变换图像示出了以原点为中心的圆形或环状图案 波数的绝对值为0mum-1，圆形或环形图案存在于波数绝对值在0.5-10μm-1范围内的区域内。

公开(公告)号：US20110169001A1

公开(公告)日：2011-07-14

申请号：US12984767

申请日：2011-01-05

Applicant: Yoshitaka Ozeki ,  Yasuhito Kuwahara ,  Shigetaka Toriyama ,  Hiroyuki Ikeda

Inventor： Yoshitaka Ozeki ,  Yasuhito Kuwahara ,  Shigetaka Toriyama ,  Hiroyuki Ikeda

IPC: H01L29/04 ,  H01L21/84

CPC classification number: H01L29/78696 ,  G02F1/13624 ,  G02F1/136286 ,  H01L29/42384 ,  H01L29/78609 ,  H01L29/78645

Abstract: A this film transistor is provided. The thin film transistor includes a semiconductor layer including a source region, a drain region, and a channel region, wherein the channel region is provided between the source region and the drain region; and a gate electrode overlapping with the channel region, wherein the channel region includes at least a portion of a channel width that is configured to at least one of continuously decrease and continuously increase in a lengthwise direction.

Abstract translation: 提供了这种胶片晶体管。 所述薄膜晶体管包括：源区域，漏极区域和沟道区域的半导体层，其中所述沟道区域设置在所述源极区域和所述漏极区域之间; 以及与沟道区重叠的栅极，其中沟道区包括沟道宽度的至少一部分，其被配置为在长度方向上连续减小并连续增加中的至少一个。

公开(公告)号：US07394514B2

公开(公告)日：2008-07-01

申请号：US11103169

申请日：2005-04-11

Applicant: Hisao Hayashi ,  Shigetaka Toriyama

Inventor： Hisao Hayashi ,  Shigetaka Toriyama

IPC: G02F1/1345

CPC classification number: G02F1/13452 ,  G02F1/136286 ,  H05K3/107

Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.

Abstract translation: 本文公开了一种显示装置，其包括彼此相对的一对基板，设置在基板之间的像素区域和设置在其中一个基板的延伸部上的外部布线。 外部布线设置在形成在延伸部上的凹部中。 利用这种结构，可以可靠地保护设置在延伸部上的外部布线，从而提高显示装置的可靠性。

公开(公告)号：US6037195A

公开(公告)日：2000-03-14

申请号：US154446

申请日：1998-09-16

Applicant: Shigetaka Toriyama ,  Hideo Hirayama

Inventor： Shigetaka Toriyama ,  Hideo Hirayama

IPC: H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L21/00

CPC classification number: H01L29/66757 ,  H01L27/1214 ,  H01L29/78621 ,  Y10S148/053

Abstract: A process of producing a thin film transistor of a liquid crystal display device according to the present invention comprises the steps of forming a semiconductor layer on an insulation substrate, stacking an insulation film and a conductive layer on the semiconductor layer, patterning the conductive layer to form a gate electrode, reducing a width of a mask used at formation of the gate electrode in a prescribed amount to form an offset region, implanting highly concentrated impurity ions into a part of the semiconductor layer where there are not the mask or the conductive layer to form an N.sup.+ -polysilicon layer, re-etching the conductive layer by using the mask used at formation of the gate electrode made narrower by the offset region, and implanting low concentrated impurity ions into the semiconductor layer below the conductor region removed by re-etching to form an N.sup.- -polysilicon layer.

Abstract translation: 根据本发明的液晶显示装置的薄膜晶体管的制造方法包括以下步骤：在绝缘基板上形成半导体层，在半导体层上堆叠绝缘膜和导电层，将导电层图案化为 形成栅极电极，减少形成栅电极的掩模的宽度，以形成偏移区域，将高度浓缩的杂质离子注入到不存在掩模或导电层的半导体层的一部分中 为了形成N + - 多晶硅层，通过使用通过偏移区域变窄的形成栅电极的掩模来重新蚀刻导电层，并且将低浓度杂质离子注入到通过重新除去的导体区域下方的半导体层中， 蚀刻以形成N - 多晶硅层。

公开(公告)号：US08558981B2

公开(公告)日：2013-10-15

申请号：US12165447

申请日：2008-06-30

Applicant: Hisao Hayashi ,  Shigetaka Toriyama

Inventor： Hisao Hayashi ,  Shigetaka Toriyama

IPC: G02F1/1345

CPC classification number: G02F1/13452 ,  G02F1/136286 ,  H05K3/107

Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.

Abstract translation: 本文公开了一种显示装置，其包括彼此相对的一对基板，设置在基板之间的像素区域和设置在其中一个基板的延伸部上的外部布线。 外部布线设置在形成在延伸部上的凹部中。 利用这种结构，可以可靠地保护设置在延伸部上的外部布线，从而提高显示装置的可靠性。