公开(公告)号：US10177067B2

公开(公告)日：2019-01-08

申请号：US15598324

申请日：2017-05-18

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Chih-Hsien Cheng ,  Shih-Hao Sun

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.

公开(公告)号：US20180090339A1

公开(公告)日：2018-03-29

申请号：US15828334

申请日：2017-11-30

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Shih-Hao Sun

IPC: H01L21/56 ,  H01L23/13 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683

CPC classification number: H01L21/56 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/3731 ,  H01L23/3738 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2221/68359 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15153 ,  H01L2924/1531 ,  Y10T29/4913 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.

公开(公告)号：US09578750B2

公开(公告)日：2017-02-21

申请号：US14097269

申请日：2013-12-05

Applicant: Subtron Technology Co., Ltd.

Inventor： Shih-Hao Sun

IPC: H05K3/00 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K3/0097 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2924/15311 ,  H05K1/186 ,  H05K3/4602 ,  H05K3/4682 ,  H05K2203/1536 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A manufacturing of a package carrier includes the following steps. Two base metal layers are bonded together. Two supporting layers are laminated onto the base metal layers respectively. Two release metal films are disposed on the supporting layers respectively. Each release metal film includes a first metal film and a second metal film separable from each other. Two first patterned metal layers are formed on the release metal films respectively. Each first patterned metal layer includes a pad pattern. Two dielectric layers are formed on the release metal films respectively and cover the corresponding first patterned metal layers. Each dielectric layer has a conductive via connecting to the corresponding pad pattern. Two second patterned metal layers are formed on the dielectric layers respectively. Each second patterned metal layer at least covers the conductive via. The base metal layers are separated from each other to form two independent package carriers.

Abstract translation: 包装载体的制造包括以下步骤。 两个贱金属层结合在一起。 两个支撑层分别层压到基底金属层上。 两个释放金属膜分别设置在支撑层上。 每个释放金属膜包括可彼此分离的第一金属膜和第二金属膜。 分别在剥离金属膜上形成两个第一图案化金属层。 每个第一图案化金属层包括焊盘图案。 分别在剥离金属膜上形成两个电介质层并覆盖对应的第一图案化金属层。 每个电介质层具有连接到相应的焊盘图案的导电通孔。 在介电层上分别形成两个第二图案化金属层。 每个第二图案化金属层至少覆盖导电通孔。 基底金属层彼此分离以形成两个独立的封装载体。

公开(公告)号：US09870931B2

公开(公告)日：2018-01-16

申请号：US15000034

申请日：2016-01-19

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Shih-Hao Sun

IPC: H05K3/30 ,  H01L21/56 ,  H01L21/683 ,  H01L21/48 ,  H01L23/498 ,  H01L23/13 ,  H01L23/367 ,  H01L23/373 ,  H01L23/31

CPC classification number: H01L21/56 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/3731 ,  H01L23/3738 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2221/68359 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15153 ,  H01L2924/1531 ,  Y10T29/4913 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.

公开(公告)号：US20160197034A1

公开(公告)日：2016-07-07

申请号：US15072349

申请日：2016-03-16

Applicant: Subtron Technology Co., Ltd.

Inventor： Shih-Hao Sun

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H05K1/181 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83455 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/186 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A package carrier suitable for carrying at least a chip is provided. The package carrier includes an insulating layer, a patterned circuit layer, a plurality of conductive connection structures, a plurality of pads, a solder resist layer and a surface treatment layer. The insulating layer has a first surface and a second surface opposite to each other. The patterned circuit layer is embedded in the second surface and has a bonding surface. The second surface and the bonding surface are coplanar, and the patterned circuit layer comprises at least one die pad. The conductive connection structures are embedded in the insulating layer and connected to the patterned circuit layer. The pads are disposed on the first surface and connected to the conductive connection structures respectively. The solder resist layer is disposed on the second surface, and the surface treatment layer is disposed on the bonding surface.

Abstract translation: 提供了适于承载至少一个芯片的封装载体。 封装载体包括绝缘层，图案化电路层，多个导电连接结构，多个焊盘，阻焊层和表面处理层。 绝缘层具有彼此相对的第一表面和第二表面。 图案化电路层嵌入第二表面并具有接合表面。 第二表面和接合表面是共面的，并且图案化电路层包括至少一个管芯焊盘。 导电连接结构嵌入绝缘层并连接到图案化电路层。 焊盘设置在第一表面上并分别连接到导电连接结构。 阻焊层设置在第二表面上，并且表面处理层设置在接合表面上。

公开(公告)号：US10319610B2

公开(公告)日：2019-06-11

申请号：US15828334

申请日：2017-11-30

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Shih-Hao Sun

IPC: H01L21/56 ,  H01L21/683 ,  H01L21/48 ,  H01L23/498 ,  H01L23/13 ,  H01L23/367 ,  H01L23/373 ,  H01L23/31

Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.

公开(公告)号：US09236364B2

公开(公告)日：2016-01-12

申请号：US14086987

申请日：2013-11-22

Applicant: Subtron Technology Co., Ltd.

Inventor： Shih-Hao Sun

IPC: H05K1/09 ,  H01L23/00 ,  H05K1/11 ,  H01L21/48 ,  H01L21/683 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56

CPC classification number: H01L24/85 ,  H01L21/4825 ,  H01L21/4832 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48245 ,  H01L2224/81005 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/8149 ,  H01L2224/83005 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/8349 ,  H01L2224/85 ,  H01L2224/85005 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/8549 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/09 ,  H05K1/111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A manufacturing method of a package carrier includes the following steps. Firstly, two base metal layers are bonded together. Then, two supporting layers are laminated onto the base metal layers respectively. Next, two release metal films are disposed on the supporting layers respectively, wherein each of the release metal films includes a first metal film and a second metal film separable from each other. Next, two patterned metal layers are formed on the release metal films respectively, wherein each of the patterned metal layers is suitable for carrying and electrically connected to a chip. Then, the base metal layers are separated from each other to form two package carriers independent from each other. A package carrier formed by the manufacturing method described above is also provided.

Abstract translation: 包装载体的制造方法包括以下步骤。 首先，将两个基底金属层接合在一起。 然后，将两个支撑层分别层压到基底金属层上。 接下来，分别在支撑层上设置两个释放金属膜，其中每个剥离金属膜包括可彼此分离的第一金属膜和第二金属膜。 接下来，分别在剥离金属膜上形成两个图案化的金属层，其中每个图案化的金属层适于承载和电连接到芯片。 然后，基底金属层彼此分离以形成彼此独立的两个封装载体。 还提供了通过上述制造方法形成的封装载体。

公开(公告)号：US09510453B2

公开(公告)日：2016-11-29

申请号：US15072349

申请日：2016-03-16

Applicant: Subtron Technology Co., Ltd.

Inventor： Shih-Hao Sun

IPC: H05K1/18 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683

CPC classification number: H05K1/181 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83455 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/186 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A package carrier suitable for carrying at least a chip is provided. The package carrier includes an insulating layer, a patterned circuit layer, a plurality of conductive connection structures, a plurality of pads, a solder resist layer and a surface treatment layer. The insulating layer has a first surface and a second surface opposite to each other. The patterned circuit layer is embedded in the second surface and has a bonding surface. The second surface and the bonding surface are coplanar, and the patterned circuit layer comprises at least one die pad. The conductive connection structures are embedded in the insulating layer and connected to the patterned circuit layer. The pads are disposed on the first surface and connected to the conductive connection structures respectively. The solder resist layer is disposed on the second surface, and the surface treatment layer is disposed on the bonding surface.

Abstract translation: 提供了适于承载至少一个芯片的封装载体。 封装载体包括绝缘层，图案化电路层，多个导电连接结构，多个焊盘，阻焊层和表面处理层。 绝缘层具有彼此相对的第一表面和第二表面。 图案化电路层嵌入第二表面并具有接合表面。 第二表面和接合表面是共面的，并且图案化电路层包括至少一个管芯焊盘。 导电连接结构嵌入绝缘层并连接到图案化电路层。 焊盘设置在第一表面上并分别连接到导电连接结构。 阻焊层设置在第二表面上，并且表面处理层设置在接合表面上。

公开(公告)号：US20180114739A1

公开(公告)日：2018-04-26

申请号：US15598324

申请日：2017-05-18

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Chih-Hsien Cheng ,  Shih-Hao Sun

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/3675 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4882 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2924/15153 ,  H01L2924/00014

Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.

公开(公告)号：US20170079128A1

公开(公告)日：2017-03-16

申请号：US15000034

申请日：2016-01-19

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Shih-Hao Sun

IPC: H05K1/02 ,  H01L21/48 ,  H01L23/498 ,  H01L23/48 ,  H05K3/28 ,  H05K1/18 ,  H05K1/11 ,  H05K3/46 ,  H05K3/30 ,  H01L21/683 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/3731 ,  H01L23/3738 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2221/68359 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15153 ,  H01L2924/1531 ,  Y10T29/4913 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.

Abstract translation: 封装载体包括衬底，至少一个导热元件，绝缘材料，第一图案化电路层和第二图案化电路层。 基板具有上表面，下表面和通孔。 导热元件设置在通孔的内部并具有第一表面和第二表面。 绝缘材料具有顶表面，底表面和从顶表面延伸到导热元件的至少一个腔。 导热元件通过绝缘材料固定在通孔中，并且空腔暴露导热元件的第一表面的一部分。 第一图案化电路层设置在上表面和顶表面上，第二图案化电路层设置在下表面和底表面上。