公开(公告)号：US20190334706A1

公开(公告)日：2019-10-31

申请号：US16388352

申请日：2019-04-18

Applicant: TESLA, INC.

Inventor： Thaddeus Fortenberry ,  Samuel Douglas Crowder ,  Patryk Kaminski ,  Daniel William Bailey ,  David Glasco

IPC: H04L9/08 ,  B60W50/02

Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.

公开(公告)号：US11646868B2

公开(公告)日：2023-05-09

申请号：US17301956

申请日：2021-04-20

Applicant: Tesla, Inc.

Inventor： Thaddeus Fortenberry ,  Samuel Douglas Crowder ,  Patryk Kaminski ,  Daniel William Bailey ,  David Glasco

IPC: H04L9/08 ,  B60W50/02 ,  B60W50/00

CPC classification number: H04L9/0819 ,  B60W50/02 ,  H04L9/0841 ,  H04L9/0894 ,  B60W2050/0005 ,  B60W2556/00

Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.

公开(公告)号：US20210385073A1

公开(公告)日：2021-12-09

申请号：US17301956

申请日：2021-04-20

Applicant: Tesla, Inc.

Inventor： Thaddeus Fortenberry ,  Samuel Douglas Crowder ,  Patryk Kaminski ,  Daniel William Bailey ,  David Glasco

IPC: H04L9/08 ,  B60W50/02

Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.

公开(公告)号：US11005649B2

公开(公告)日：2021-05-11

申请号：US16388352

申请日：2019-04-18

Applicant: TESLA, INC.

Inventor： Thaddeus Fortenberry ,  Samuel Douglas Crowder ,  Patryk Kaminski ,  Daniel William Bailey ,  David Glasco

IPC: H04L9/08 ,  B60W50/02 ,  B60W50/00

Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.