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公开(公告)号：US11005649B2
公开(公告)日：2021-05-11
申请号：US16388352
申请日：2019-04-18
Applicant: TESLA, INC.
Inventor： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.
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公开(公告)号：US20190332816A1
公开(公告)日：2019-10-31
申请号：US16388451
申请日：2019-04-18
Applicant: TESLA, INC.
Inventor： David Glasco , Patryk Kaminski , Thaddeus Fortenberry
Abstract: A System on a Chip (SoC) includes a plurality of general purpose processors, a plurality of application specific processors, a plurality of SoC support processing components, a security processing subsystem (SCS), a general access Network on a Chip (NoC) coupled to and servicing communications between the plurality of general purpose processors and the plurality of SoC support components, and a proprietary access NoC coupled to and servicing communications for the plurality of application specific processors and the SCS. The SoC may further include a safety processor subsystem (SMS) coupled to the proprietary access NoC, wherein the proprietary access NoC further services communications for the SMS and isolates communications of the SMS from communications of the plurality of general purpose processors. The general access NoC and the proprietary access NoC isolate communications of the SCS and the SMS from communications of the plurality of general purpose processors.
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公开(公告)号：US20230281017A1
公开(公告)日：2023-09-07
申请号：US18173656
申请日：2023-02-23
Applicant: Tesla, Inc.
Inventor： Patryk Kaminski , Thaddeus Fortenberry , David Glasco
IPC: G06F9/4401 , B60R16/023 , G05D1/00
CPC classification number: G06F9/4405 , B60R16/023 , G05D1/0055 , G05D1/0088 , G05D2201/0213
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data. Each of the plurality of parallel processors includes a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The general processors, the SCSs, and the SMSs of the plurality of parallel processors are configured to first, boot the plurality of SCSs from ROM second, boot the plurality of SMSs of the plurality of parallel processors from RAM or ROM, and, third, boot the plurality of general processors of the plurality of parallel processors from RAM. Between booting of the SCSs and the SMSs, at least one of the plurality of SCSs may load SMS boot code into the RAM that is dedicated to the plurality of SMSs.
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公开(公告)号：US20190334706A1
公开(公告)日：2019-10-31
申请号：US16388352
申请日：2019-04-18
Applicant: TESLA, INC.
Inventor： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.
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公开(公告)号：US11593119B2
公开(公告)日：2023-02-28
申请号：US16388541
申请日：2019-04-18
Applicant: Tesla, Inc.
Inventor： Patryk Kaminski , Thaddeus Fortenberry , David Glasco
IPC: G06F9/4401 , B60R16/023 , G05D1/00
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data. Each of the plurality of parallel processors includes a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The general processors, the SCSs, and the SMSs of the plurality of parallel processors are configured to first, boot the plurality of SCSs from ROM second, boot the plurality of SMSs of the plurality of parallel processors from RAM or ROM, and, third, boot the plurality of general processors of the plurality of parallel processors from RAM. Between booting of the SCSs and the SMSs, at least one of the plurality of SCSs may load SMS boot code into the RAM that is dedicated to the plurality of SMSs.
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Patent Agency Ranking
公开(公告)号：US11423178B2
公开(公告)日：2022-08-23
申请号：US16388451
申请日：2019-04-18
Applicant: TESLA, INC.
Inventor： David Glasco , Patryk Kaminski , Thaddeus Fortenberry
Abstract: A System on a Chip (SoC) includes a plurality of general purpose processors, a plurality of application specific processors, a plurality of SoC support processing components, a security processing subsystem (SCS), a general access Network on a Chip (NoC) coupled to and servicing communications between the plurality of general purpose processors and the plurality of SoC support components, and a proprietary access NoC coupled to and servicing communications for the plurality of application specific processors and the SCS. The SoC may further include a safety processor subsystem (SMS) coupled to the proprietary access NoC, wherein the proprietary access NoC further services communications for the SMS and isolates communications of the SMS from communications of the plurality of general purpose processors. The general access NoC and the proprietary access NoC isolate communications of the SCS and the SMS from communications of the plurality of general purpose processors.
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公开(公告)号：US11960901B2
公开(公告)日：2024-04-16
申请号：US18173656
申请日：2023-02-23
Applicant: Tesla, Inc.
Inventor： Patryk Kaminski , Thaddeus Fortenberry , David Glasco
IPC: G06F9/4401 , B60R16/023 , G05D1/00
CPC classification number: G06F9/4405 , B60R16/023 , G05D1/0055 , G05D1/0088 , G05D2201/0213
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data. Each of the plurality of parallel processors includes a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The general processors, the SCSs, and the SMSs of the plurality of parallel processors are configured to first, boot the plurality of SCSs from ROM second, boot the plurality of SMSs of the plurality of parallel processors from RAM or ROM, and, third, boot the plurality of general processors of the plurality of parallel processors from RAM. Between booting of the SCSs and the SMSs, at least one of the plurality of SCSs may load SMS boot code into the RAM that is dedicated to the plurality of SMSs.
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公开(公告)号：US11646868B2
公开(公告)日：2023-05-09
申请号：US17301956
申请日：2021-04-20
Applicant: Tesla, Inc.
Inventor： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
CPC classification number: H04L9/0819 , B60W50/02 , H04L9/0841 , H04L9/0894 , B60W2050/0005 , B60W2556/00
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.
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公开(公告)号：US20210385073A1
公开(公告)日：2021-12-09
申请号：US17301956
申请日：2021-04-20
Applicant: Tesla, Inc.
Inventor： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.
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公开(公告)号：US20190332390A1
公开(公告)日：2019-10-31
申请号：US16388541
申请日：2019-04-18
Applicant: TESLA, INC.
Inventor： Patryk Kaminski , Thaddeus Fortenberry , David Glasco
IPC: G06F9/4401 , B60R16/023 , G05D1/00
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data. Each of the plurality of parallel processors includes a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The general processors, the SCSs, and the SMSs of the plurality of parallel processors are configured to first, boot the plurality of SCSs from ROM second, boot the plurality of SMSs of the plurality of parallel processors from RAM or ROM, and, third, boot the plurality of general processors of the plurality of parallel processors from RAM. Between booting of the SCSs and the SMSs, at least one of the plurality of SCSs may load SMS boot code into the RAM that is dedicated to the plurality of SMSs.
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