Circuits and methods for generating a supply voltage for a switching regulator

    公开(公告)号:US11641162B2

    公开(公告)日:2023-05-02

    申请号:US13859286

    申请日:2013-04-09

    Abstract: Circuits and methods for converting a current to an output voltage are disclosed herein. An embodiment of the circuit includes a first switch connected between a source of current and a first node and a second switch connected between the first node and a common voltage. The circuit also includes a first controller for controlling the state of the first switch and a second controller for controlling the state of the second switch. A capacitor is coupled to the first node; the voltage on the capacitor is the output voltage. When the second switch is open, the capacitor charges, and when the second switch is closed, the capacitor does not charge. The current flows through the primary inductance of a transformer.

    PRIMARY SIDE BURST MODE CONTROLLER FOR LLC CONVERTER

    公开(公告)号:US20210257917A1

    公开(公告)日:2021-08-19

    申请号:US17308634

    申请日:2021-05-05

    Abstract: Embodiments include systems, methods, and apparatuses for controlling off-time during a burst mode in an LLC converter. In one embodiment, a circuit comprises an LLC converter having a primary side and a burst mode controller, the burst mode controller configured to monitor, on the primary side of the LLC converter, electrical current, and in response to a determination that the electrical current is below a first threshold, increase an off-time for switches in the LLC converter and in response to a determination that the electrical current is above a second threshold that is higher than the first threshold, decrease the off-time for the switches in the LLC converter.

    Power factor correction zero current detection

    公开(公告)号:US10673322B1

    公开(公告)日:2020-06-02

    申请号:US16544425

    申请日:2019-08-19

    Abstract: A power factor correction controller zero current detection circuit includes a differentiator circuit, a comparator, a first qualification timer circuit, an idle ringing detector circuit, a second qualification timer circuit, and a flip-flop. The comparator is coupled to the differentiator circuit. The first qualification timer circuit includes an input coupled to an output of the comparator. The idle ringing detector circuit includes a first input coupled to the output of the comparator, and a second input coupled to an output of the first qualification timer circuit. The second qualification timer circuit includes a first input coupled to the output of the first qualification timer circuit, and a second input coupled an output of the idle ringing detector circuit. The flip-flop includes a first input coupled to the output of the comparator, and a second input coupled to an output of the second qualification timer circuit.

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